CPU(4) BSD Programmer's Manual (i386) CPU(4)NAME
cpu - Central Processing Unit
SYNOPSIS
option I386_CPU
option I486_CPU
option I586_CPU
option I686_CPU
DESCRIPTION
Several processor models have additional features that extend their base
functionality, such as power and frequency control or additonal instruc-
tions.
FREQUENCY CONTROL
The sysctl(3) hw.cpuspeed will return the current operating frequency of
the processor. If possible, speed may be adjusted by altering hw.setperf
from 0 to 100, representing percentage of maximum speed. There are
several possible implementations for setperf, all transparent to the
user. In systems with more than one control capability, they are pre-
ferred in the order given.
LongRun Found on Transmeta Crusoe processors, offers frequency scal-
ing with numerous positions. The processor dynamically ad-
justs frequency in response to load, the setperf value is in-
terpreted as the maximum.
EST Enhanced SpeedStep found on Intel Pentium M processors,
offers frequency scaling with numerous positions.
SpeedStep Found on some Intel Pentium 3 and newer mobile chips, it is
capable of adjusting frequency between a low and high value.
Only enabled on some chipsets.
TCC Thermal Control Circuit found on Intel Pentium 4 and newer
processors, adjusts processor duty cycle in 12.5 percent in-
crements.
PowerNow Found on various AMD processors. Currently only supports some
models in the K6 family.
INSTRUCTION SET EXTENSIONS
The presence of extended instruction sets can be determined by sysctl
machdep.
osfxsr Supports the fxsave instruction.
sse Supports the SSE instruction set.
sse2 Supports the SSE2 instruction set.
xcrypt Support the VIA AES encryption instruction set. If this is
supported, the libcrypto EVP AES functions will automatically
use this support.
SEE ALSOichpcib(4), npx(4), sysctl(8)MirOS BSD #10-current March 15, 2004 1