/********************************************************************************************************************************/
/* Created: 15-MAR-2001 23:38:08 by OpenVMS SDL EV1-33     */
/* Source:  15-MAR-2001 23:34:16 _$11$DUA933:[BUILD.SDL]STARDEFMP.SDI;1 */
/********************************************************************************************************************************/
/*** MODULE $PR9CCDEF ***/
#ifndef __PR9CCDEF_LOADED
#define __PR9CCDEF_LOADED 1
 
#pragma nostandard
 
#ifdef __cplusplus
    extern "C" {
#define __unknown_params ...
#else
#define __unknown_params
#endif
 
#if !defined(__VAXC) && !defined(VAXC)
#define __struct struct
#define __union union
#else
#define __struct variant_struct
#define __union variant_union
#endif
 
#define PR9CC$_ICCS 24                  /* Interval Clock Control/Status    */
#define PR9CC$_TODR 27                  /* Time of Year Clock               */
#define PR9CC$_RXCS 32                  /* Console Receiver Control/Status  */
#define PR9CC$_RXDB 33                  /* Console Receiver Data Buffer     */
#define PR9CC$_TXCS 34                  /* Console Transmit Control/Status  */
#define PR9CC$_TXDB 35                  /* Console Transmit Data Buffer     */
#define PR9CC$_CADR 37                  /* Cache Disable Register           */
#define PR9CC$_MSER 39                  /* Memory System Error              */
#define PR9CC$_SAVPC 42                 /* Console SAVED PC                 */
#define PR9CC$_SAVPSL 43                /* Console SAVED PSL                */
#define PR9CC$_SID 62                   /* System Identification Register   */
#define PR9CC$M_DIAG 0x1
#define PR9CC$M_WRONG_PARITY 0x2
#define PR9CC$M_D_STREAM 0x10
#define PR9CC$M_I_STREAM 0x20
#define PR9CC$M_ENAB_SET1 0x40
#define PR9CC$M_ENAB_SET2 0x80
#define PR9CC$M_TAG 0x1
#define PR9CC$M_DAT 0x2
#define PR9CC$M_ST1 0x4
#define PR9CC$M_ST2 0x8
#define PR9CC$M_MCC 0x10
#define PR9CC$M_MCD 0x20
#define PR9CC$M_DAL 0x40
#define PR9CC$M_HM 0x80
#define PR9CC_XSID$_JIMMIED0 0          /* Jimmied ROM                      */
#define PR9CC_XSID$_TIMESHARE 1         /* Timeshare system                 */
#define PR9CC_XSID$_SERVER 2            /* Server system                    */
#define PR9CC_XSID$_JIMMIED3 3          /* Jimmied ROM                      */
#define PR9CC_XSID$_XCPFWREV31 49       /* Console REV 3.1                  */
#define PR9CC_XSID$_XCPFWREV40 64       /* Console REV 4.0                  */
#define PR9CC_XSID$_REV31 0             /* Rev 3.1 ROMs                     */
#define PR9CC_XSID$_XCP 1               /* XCP 80NS CVAX                    */
#define PR9CC_XSID$_HYPERION 2          /* Hyperion 60NS CVAX               */
union pr9ccdef {
    __struct  {                         /* Cache Disable Register           */
        unsigned pr9cc$v_diag : 1;      /* Diagnostic Mode                  */
        unsigned pr9cc$v_wrong_parity : 1; /* Write Wrong Parity            */
        unsigned pr9cc$$_fill_1 : 2;    /*                                  */
        unsigned pr9cc$v_d_stream : 1;  /* Store D-Stream in cache          */
        unsigned pr9cc$v_i_stream : 1;  /* Store I-Stream in cache          */
        unsigned pr9cc$v_enab_set1 : 1; /* Enable Set 1 of cache            */
        unsigned pr9cc$v_enab_set2 : 1; /* Enable Set 2 of cache            */
        } pr9cc$r_pr9cccadr_bits;
    __struct  {                         /* Memory System Error Register     */
        unsigned pr9cc$v_tag : 1;       /* Tag Parity Error                 */
        unsigned pr9cc$v_dat : 1;       /* Data Parity Error                */
        unsigned pr9cc$v_st1 : 1;       /* Set 1 Parity Error               */
        unsigned pr9cc$v_st2 : 1;       /* Set 2 Parity Error               */
        unsigned pr9cc$v_mcc : 1;       /* Machine Check/Cache parity       */
        unsigned pr9cc$v_mcd : 1;       /* Machine Check/DAL parity         */
        unsigned pr9cc$v_dal : 1;       /* DAL parity error                 */
        unsigned pr9cc$v_hm : 1;        /* Hit/Miss                         */
        } pr9cc$r_pr9ccmser_bits;
    __struct  {                         /* System Identification Register   */
        unsigned pr9cc$v_sid_cvaxrev : 8; /*  CVAX chip microcode revision level  */
        } pr9cc$r_pr9ccsid_bits;
    __struct  {                         /* XSID (SYS_TYPE) Register         */
        unsigned pr9cc$v_xsid_license : 8; /* License bits                  */
        unsigned pr9cc$v_xsid_calypso : 8; /* XCP / Hyperion distiction     */
        unsigned pr9cc$v_xsid_xcpfwrev : 8; /* Calypso firmware revision level  */
        unsigned pr9cc$v_xsid_type : 8; /* CPU type                         */
        } pr9cc$r_pr9ccxsid_bits;
    } ;
 
#if !defined(__VAXC) && !defined(VAXC)
#define pr9cc$v_diag pr9cc$r_pr9cccadr_bits.pr9cc$v_diag
#define pr9cc$v_wrong_parity pr9cc$r_pr9cccadr_bits.pr9cc$v_wrong_parity
#define pr9cc$v_d_stream pr9cc$r_pr9cccadr_bits.pr9cc$v_d_stream
#define pr9cc$v_i_stream pr9cc$r_pr9cccadr_bits.pr9cc$v_i_stream
#define pr9cc$v_enab_set1 pr9cc$r_pr9cccadr_bits.pr9cc$v_enab_set1
#define pr9cc$v_enab_set2 pr9cc$r_pr9cccadr_bits.pr9cc$v_enab_set2
#define pr9cc$v_tag pr9cc$r_pr9ccmser_bits.pr9cc$v_tag
#define pr9cc$v_dat pr9cc$r_pr9ccmser_bits.pr9cc$v_dat
#define pr9cc$v_st1 pr9cc$r_pr9ccmser_bits.pr9cc$v_st1
#define pr9cc$v_st2 pr9cc$r_pr9ccmser_bits.pr9cc$v_st2
#define pr9cc$v_mcc pr9cc$r_pr9ccmser_bits.pr9cc$v_mcc
#define pr9cc$v_mcd pr9cc$r_pr9ccmser_bits.pr9cc$v_mcd
#define pr9cc$v_dal pr9cc$r_pr9ccmser_bits.pr9cc$v_dal
#define pr9cc$v_hm pr9cc$r_pr9ccmser_bits.pr9cc$v_hm
#define pr9cc$v_sid_cvaxrev pr9cc$r_pr9ccsid_bits.pr9cc$v_sid_cvaxrev
#define pr9cc$v_xsid_license pr9cc$r_pr9ccxsid_bits.pr9cc$v_xsid_license
#define pr9cc$v_xsid_calypso pr9cc$r_pr9ccxsid_bits.pr9cc$v_xsid_calypso
#define pr9cc$v_xsid_xcpfwrev pr9cc$r_pr9ccxsid_bits.pr9cc$v_xsid_xcpfwrev
#define pr9cc$v_xsid_type pr9cc$r_pr9ccxsid_bits.pr9cc$v_xsid_type
#endif		/* #if !defined(__VAXC) && !defined(VAXC) */
 
 
#ifdef __cplusplus
    }
#endif
#pragma standard
 
#endif /* __PR9CCDEF_LOADED */