/********************************************************************************************************************************/ /* Created: 15-MAR-2001 23:38:08 by OpenVMS SDL EV1-33 */ /* Source: 15-MAR-2001 23:34:16 _$11$DUA933:[BUILD.SDL]STARDEFMP.SDI;1 */ /********************************************************************************************************************************/ /*** MODULE $PR8NNDEF ***/ #ifndef __PR8NNDEF_LOADED #define __PR8NNDEF_LOADED 1 #pragma nostandard #ifdef __cplusplus extern "C" { #define __unknown_params ... #else #define __unknown_params #endif #if !defined(__VAXC) && !defined(VAXC) #define __struct struct #define __union union #else #define __struct variant_struct #define __union variant_union #endif #define PR8NN$_NICR 25 /* Next Interval Count Register */ #define PR8NN$_ICR 26 /* Interval Counter Register */ #define PR8NN$_TODR 27 /* Time of Year */ #define PR8NN$_PME 61 /* Performance Monitor Enable */ #define PR8NN$_MCSTS 38 /* Machine Check Status Register */ #define PR8NN$_NICTRL 128 /* NMI and Interrupt Control Register */ #define PR8NN$_INOP 129 /* Interrupt Other Processor */ #define PR8NN$_NMIFSR 130 /* NMI Fault/Status Register */ #define PR8NN$_NMISILO 131 /* NMI Bus Silo */ #define PR8NN$_NMIEAR 132 /* NMI Error Address Register */ #define PR8NN$_COR 133 /* Cache On Register */ #define PR8NN$_REVR1 134 /* Revision Register #1 */ #define PR8NN$_REVR2 135 /* Revision Register #2 */ #define PR8NN$M_SID_LRCPU 0x800000 #define PR8NN$M_RXDB_LAVL 0x1 #define PR8NN$M_RXDB_RAVL 0x2 #define PR8NN$M_RXDB_SENB 0x4 #define PR8NN$M_RXDB_UNI 0x8 #define PR8NN$M_RXDB_DKEY 0x10 #define PR8NN$M_RXDB_VKEY 0x20 #define PR8NN$M_RXDB_PCPU 0x40 #define PR8NN$M_RXDB_SLOW 0x80 #define PR8NN$M_RXDB_BOUN 0x1 #define PR8NN$M_RXDB_SP1 0x2 #define PR8NN$M_RXDB_SP2 0x4 union pr8nndef { __struct { /* Read only SID register */ unsigned pr8nn$v_sid_serial : 16; /* Processor Serial Number */ unsigned pr8nn$v_sid_cpurev : 7; /* CPU Revision Level */ unsigned pr8nn$v_sid_lrcpu : 1; /* Left/Right CPU bit */ unsigned pr8nn$v_sid_type : 8; /* CPU Type Code */ } pr8nn$r_pr8nnsid_bits; __struct { /* Read only REVR2 register */ unsigned pr8nn$$_fill_1 : 8; /* */ unsigned pr8nn$v_revr2_cnsrv : 8; /* Console Revision Level */ unsigned pr8nn$v_revr2_uwcs : 8; /* WCS Revision Level */ unsigned pr8nn$v_revr2_ucode : 8; /* Microcode Revision Level */ } pr8nn$r_pr8nnrevr2_bits; /* */ /* Bit definitions for data returned by the GET_CPU_INFO console command */ /* through the RXDB IPR. */ /* */ /* The first group of names include bits that are similarly defined for */ /* both uniprocessor and dual processor configurations. The second group */ /* of names defines those bits that are specific to uniprocessor configurations. */ /* */ __struct { /* */ unsigned pr8nn$v_rxdb_lavl : 1; /* Left CPU Available */ unsigned pr8nn$v_rxdb_ravl : 1; /* Right CPU Available */ unsigned pr8nn$v_rxdb_senb : 1; /* Secondary CPU Enabled */ unsigned pr8nn$v_rxdb_uni : 1; /* Uni-processor Configuration */ unsigned pr8nn$v_rxdb_dkey : 1; /* Diag Key Matched SID */ unsigned pr8nn$v_rxdb_vkey : 1; /* VMS Key Matched SID */ unsigned pr8nn$v_rxdb_pcpu : 1; /* 'Primary' CPU designator */ unsigned pr8nn$v_rxdb_slow : 1; /* Slow/Fast designation */ } pr8nn$r_pr8nnrxdb_bits1; __struct { /* */ unsigned pr8nn$v_rxdb_boun : 1; /* Bounded System Configuration */ unsigned pr8nn$v_rxdb_sp1 : 1; /* Unused */ unsigned pr8nn$v_rxdb_sp2 : 1; /* Unused */ unsigned pr8nn$v_fill_66 : 5; } pr8nn$r_pr8nnrxdb_bits2; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr8nn$v_sid_serial pr8nn$r_pr8nnsid_bits.pr8nn$v_sid_serial #define pr8nn$v_sid_cpurev pr8nn$r_pr8nnsid_bits.pr8nn$v_sid_cpurev #define pr8nn$v_sid_lrcpu pr8nn$r_pr8nnsid_bits.pr8nn$v_sid_lrcpu #define pr8nn$v_sid_type pr8nn$r_pr8nnsid_bits.pr8nn$v_sid_type #define pr8nn$v_revr2_cnsrv pr8nn$r_pr8nnrevr2_bits.pr8nn$v_revr2_cnsrv #define pr8nn$v_revr2_uwcs pr8nn$r_pr8nnrevr2_bits.pr8nn$v_revr2_uwcs #define pr8nn$v_revr2_ucode pr8nn$r_pr8nnrevr2_bits.pr8nn$v_revr2_ucode #define pr8nn$v_rxdb_lavl pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_lavl #define pr8nn$v_rxdb_ravl pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_ravl #define pr8nn$v_rxdb_senb pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_senb #define pr8nn$v_rxdb_uni pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_uni #define pr8nn$v_rxdb_dkey pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_dkey #define pr8nn$v_rxdb_vkey pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_vkey #define pr8nn$v_rxdb_pcpu pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_pcpu #define pr8nn$v_rxdb_slow pr8nn$r_pr8nnrxdb_bits1.pr8nn$v_rxdb_slow #define pr8nn$v_rxdb_boun pr8nn$r_pr8nnrxdb_bits2.pr8nn$v_rxdb_boun #define pr8nn$v_rxdb_sp1 pr8nn$r_pr8nnrxdb_bits2.pr8nn$v_rxdb_sp1 #define pr8nn$v_rxdb_sp2 pr8nn$r_pr8nnrxdb_bits2.pr8nn$v_rxdb_sp2 #endif /* #if !defined(__VAXC) && !defined(VAXC) */ /* */ /* Field definitions for console interface thru RXCS/TXCS/RXDB/TXDB */ /* */ /* */ /* RXCS - Console to CPU status register */ /* */ /* 31 24 23 16 15 08 07 06 00 */ /* +--------------+--------------+---------------+----+----+--------+ */ /* | MBZ | MBZ | MBZ |DONE| IE | MBZ | */ /* +--------------+--------------+---------------+----+----+--------+ */ /* */ #define RXCS$M_INT_ENABLE 0x40 #define RXCS$M_N_DONE 0x80 struct n_rxcs_register { __union { unsigned int rxcs$l_rxcs; __struct { unsigned rxcs$v_fill_0 : 6; /* Must Be Zero */ unsigned rxcs$v_int_enable : 1; /* Interrupts enabled */ unsigned rxcs$v_n_done : 1; /* Operation done */ unsigned rxcs$v_fill_8 : 24; } rxcs$r_fill_68; } rxcs$r_fill_67; } ; #if !defined(__VAXC) && !defined(VAXC) #define rxcs$l_rxcs rxcs$r_fill_67.rxcs$l_rxcs #define rxcs$v_int_enable rxcs$r_fill_67.rxcs$r_fill_68.rxcs$v_int_enable #define rxcs$v_n_done rxcs$r_fill_67.rxcs$r_fill_68.rxcs$v_n_done #endif /* #if !defined(__VAXC) && !defined(VAXC) */ /* */ /* RXDB - Console to CPU communication */ /* */ /* 31 24 23 16 15 14 12 11 08 07 00 */ /* +--------------+--------------+--+-------+--------+-------------+ */ /* | MBZ | MBZ |ER| MBZ | ID | DATA FIELD | */ /* +--------------+--------------+--+-------+--------+-------------+ */ /* */ #define RXDB$M_ERROR 0x8000 #define RXDB$K_OPA0_DATA 0 /* 0 Local terminal read ascii data */ #define RXDB$K_CSA1_DATA 1 /* 1 Drive 1 data binary data */ #define RXDB$K_CSA3_DATA 2 /* 2 Drive 3 data binary data */ #define RXDB$K_OPA4_DATA 3 /* 3 Local term (nolog) read ascii data */ #define RXDB$K_CSA2_DATA 4 /* 4 Drive 2 data binary data */ #define RXDB$K_CSM_CKSUM 5 /* 5 */ #define RXDB$K_OPA5_DATA 6 /* 6 Remote terminal read ascii data */ #define RXDB$K_CSAX_STATUS 7 /* 7 CSAx status byte binary data */ #define RXDB$K_CONS_VAX 8 /* 8 Misc message see data below */ #define RXDB$K_GET_CPU_DATA 9 /* 9 Get-CPU-Data response binary data */ #define RXDB$K_CSM_CMD 10 /* A Cons support ucode cmd function code */ #define RXDB$K_CSM_DATA 11 /* B Console support data binary data */ #define RXDB$K_SPARE_C 12 /* C spare */ #define RXDB$K_TOY_DATA 13 /* D TOY clock data binary data */ #define RXDB$K_SPARE_E 14 /* E spare */ #define RXDB$K_DECNET_DATA 15 /* F DECnet data binary data */ /* */ #define RXDB$K_ENV_ALERT 0 /* Environmental Alert */ #define RXDB$K_CSA1_STATUS 1 /* CSA1 Status */ #define RXDB$K_CSA2_STATUS 2 /* CSA2 Status */ #define RXDB$K_REM_PORT_STATUS 3 /* Remote Port Status */ #define RXDB$K_CONSOLE_STATUS 4 /* Console Status */ #define RXDB$K_CSA3_STATUS 5 /* CSA3 Status */ #define RXDB$K_SPARE_6 6 /* spare */ #define RXDB$K_TOY_PE 7 /* TOY clock protocol error */ #define RXDB$K_EMM_STATUS 8 /* EMM status inquiry response */ /* Insert new console-to-vax message types above this line */ #define RXDB$K_MAX_TYPE 9 /* Highest defined console-to-VAX message type */ /* */ #define RXDB$K_EMM_BLOWER 0 /* Blower out */ #define RXDB$K_EMM_YELLOW 1 /* Yellow zone warning */ #define RXDB$K_EMM_RED 2 /* Red zone warning */ /* */ #define RXDB$K_SUCCESS 0 /* Success, note low bit clear */ #define RXDB$K_IO_ERROR 1 /* POS IO Error, RMS Code follows */ #define RXDB$K_OPEN_ERROR 2 /* Failure to OPEN */ #define RXDB$K_IO_BLK_ERROR 3 /* QIO completion code follows */ #define RXDB$K_QIO_ERROR 4 /* QIO completion code follows */ #define RXDB$K_WRITE_ERROR 5 /* Can't write to hard disk */ /* */ #define RXDB$K_CARRIER_PRESENT 0 /* */ #define RXDB$K_CARRIER_ABSENT 15 /* hex F */ #define RXDB$K_CONSOLE_PRESENT 0 /* */ #define RXDB$K_CONSOLE_ABSENT 15 /* hex F - about to be absent */ struct n_rxdb_register { __union { unsigned int rxdb$l_rxdb; __struct { __union { unsigned char rxdb$b_data; /* Data byte */ __struct { unsigned rxdb$v_msg : 4; unsigned rxdb$v_msg_type : 4; } rxdb$r_data_fields; } rxdb$r_rxdb_data_overlay; unsigned rxdb$v_id : 4; unsigned rxdb$v_fill : 3; unsigned rxdb$v_error : 1; unsigned short int rxdb$w_hiword; } rxdb$r_fill_70; } rxdb$r_fill_69; /* */ /* Constant definitions for id field */ /* */ /* Valu Function Name Data Field */ /* Constant values for data byte message type field */ /* */ /* Definitions for MESSAGE data byte field for environmental alert. */ /* */ /* Definitions for MESSAGE data byte for CSA1/CSA2/CSA3 Status */ /* */ /* Constant definitions for Remote Port and Console status. */ /* */ } ; #if !defined(__VAXC) && !defined(VAXC) #define rxdb$l_rxdb rxdb$r_fill_69.rxdb$l_rxdb #define rxdb$b_data rxdb$r_fill_69.rxdb$r_fill_70.rxdb$r_rxdb_data_overlay.rxdb$b_data #define rxdb$v_msg rxdb$r_fill_69.rxdb$r_fill_70.rxdb$r_rxdb_data_overlay.rxdb$r_data_fields.rxdb$v_msg #define rxdb$v_msg_type rxdb$r_fill_69.rxdb$r_fill_70.rxdb$r_rxdb_data_overlay.rxdb$r_data_fields.rxdb$v_msg_type #define rxdb$v_id rxdb$r_fill_69.rxdb$r_fill_70.rxdb$v_id #define rxdb$v_error rxdb$r_fill_69.rxdb$r_fill_70.rxdb$v_error #endif /* #if !defined(__VAXC) && !defined(VAXC) */ /* */ /* TXCS - Console to CPU status register */ /* */ /* 31 24 23 16 15 08 07 06 00 */ /* +--------------+--------------+---------------+----+----+--------+ */ /* | MBZ | MBZ | MBZ |DONE| IE | MBZ | */ /* +--------------+--------------+---------------+----+----+--------+ */ /* */ #define TXCS$M_INT_ENABLE 0x40 #define TXCS$M_READY 0x80 struct n_txcs_register { __union { unsigned int txcs$l_txcs; __struct { unsigned txcs$v_fill_0 : 6; /* Must Be Zero */ unsigned txcs$v_int_enable : 1; /* Interrupts enabled */ unsigned txcs$v_ready : 1; /* Data register ready */ unsigned txcs$v_fill_8 : 24; } txcs$r_fill_72; } txcs$r_fill_71; } ; #if !defined(__VAXC) && !defined(VAXC) #define txcs$l_txcs txcs$r_fill_71.txcs$l_txcs #define txcs$v_int_enable txcs$r_fill_71.txcs$r_fill_72.txcs$v_int_enable #define txcs$v_ready txcs$r_fill_71.txcs$r_fill_72.txcs$v_ready #endif /* #if !defined(__VAXC) && !defined(VAXC) */ /* */ /* TXDB - CPU to Console communication */ /* */ /* 31 24 23 16 15 14 12 11 08 07 00 */ /* +--------------+--------------+--+-------+--------+-------------+ */ /* | MBZ | MBZ |ER| MBZ | ID | DATA FIELD | */ /* +--------------+--------------+--+-------+--------+-------------+ */ /* */ #define TXDB$M_ERROR 0x8000 #define TXDB$K_OPA0_DATA 0 /* 0 Local terminal write ascii data */ #define TXDB$K_CSA1_DATA 1 /* 1 Drive 1 data binary data */ #define TXDB$K_CSA3_DATA 2 /* 2 Drive 3 data binary data */ #define TXDB$K_OPA4_DATA 3 /* 3 Nolog term/diag writ ascii/binary data */ #define TXDB$K_CSA2_DATA 4 /* 4 Drive 2 data binary data */ #define TXDB$K_UNS_CSM_DATA 5 /* 5 Unsolicited CSM data csm status */ #define TXDB$K_OPA5_DATA 6 /* 6 Remote terminal write ascii data */ #define TXDB$K_DIAGNOSTIC 7 /* 7 */ #define TXDB$K_DECNET_DATA 8 /* 8 DECnet data binary data */ #define TXDB$K_DRIVE_CMD 9 /* 9 Drive (CSA1/2/3) command function code */ #define TXDB$K_CSM_CMD 10 /* A Cons support ucode cmd function code */ #define TXDB$K_CSM_DATA 11 /* B Console support data binary data */ #define TXDB$K_CSM_CKSUM 12 /* C CSM checksum binary data */ #define TXDB$K_TOY_DATA 13 /* D TOY clock data binary data */ #define TXDB$K_SPARE_E 14 /* E (unused) */ #define TXDB$K_MISC_COMM 15 /* F Miscellaneous command command code */ /* */ #define TXDB$K_CSA1_CMD 0 /* csa1 command */ #define TXDB$K_CSA2_CMD 1 /* csa2 command */ #define TXDB$K_CSA3_CMD 2 /* csa3 command */ /* */ #define TXDB$K_READ_SECTOR 0 /* */ #define TXDB$K_WRITE_SECTOR 1 /* */ #define TXDB$K_READ_STATUS 2 /* */ /* */ #define TXDB$K_SOFTWARE_DONE 1 /* 1 - Software is done */ #define TXDB$K_BOOT_THIS_CPU 2 /* 2 - Boot this cpu */ #define TXDB$K_CLEAR_WARM_START 3 /* 3 - Clear warm start flag */ #define TXDB$K_CLEAR_COLD_START 4 /* 4 - Clear cold start flag */ #define TXDB$K_BOOT_OTHER_CPU 5 /* 5 - Boot (restart) other cpu */ #define TXDB$K_UNJAM 6 /* 6 - UNJAM command */ #define TXDB$K_LOADNBOOT 7 /* 7 - @LOADNBOOT */ #define TXDB$K_TOY_READ 8 /* 8 - Read TOY register */ #define TXDB$K_TOY_WRITE 9 /* 9 - Write TOY register */ #define TXDB$K_DISABLE_SEC 10 /* A - Disable secondary */ #define TXDB$K_EMM_STATUS_INQ 11 /* B - EMM Status Inquiry */ #define TXDB$K_FORCE_NEXT_PRIM 12 /* C - Force next primary to opposite */ #define TXDB$K_GET_CPU_INFO 13 /* D - Get CPU Information request */ struct n_txdb_register { __union { unsigned int txdb$l_txdb; __struct { __union { unsigned char txdb$b_data; /* Data byte */ __struct { unsigned txdb$v_msg : 4; unsigned txdb$v_msg_type : 4; } txdb$r_data_fields; } txdb$r_txdb_data_overlay; unsigned txdb$v_id : 4; /* ID field */ unsigned txdb$v_fill : 3; /* unused, must be zero */ unsigned txdb$v_error : 1; /* Error flag */ unsigned short int txdb$w_hiword; /* unused, must be zero */ } txdb$r_fill_74; } txdb$r_fill_73; /* */ /* Constant definitions for id field */ /* */ /* Valu Function Name Data Field */ /* Definitions for data byte fields for CSAx command message type */ /* */ /* Definitions for data byte field for csax_cmd message */ /* */ /* Definitions for data byte field for miscellaneous communications. */ /* */ } ; #if !defined(__VAXC) && !defined(VAXC) #define txdb$l_txdb txdb$r_fill_73.txdb$l_txdb #define txdb$b_data txdb$r_fill_73.txdb$r_fill_74.txdb$r_txdb_data_overlay.txdb$b_data #define txdb$v_msg txdb$r_fill_73.txdb$r_fill_74.txdb$r_txdb_data_overlay.txdb$r_data_fields.txdb$v_msg #define txdb$v_msg_type txdb$r_fill_73.txdb$r_fill_74.txdb$r_txdb_data_overlay.txdb$r_data_fields.txdb$v_msg_type #define txdb$v_id txdb$r_fill_73.txdb$r_fill_74.txdb$v_id #define txdb$v_error txdb$r_fill_73.txdb$r_fill_74.txdb$v_error #endif /* #if !defined(__VAXC) && !defined(VAXC) */ /* */ /* Definitions for data byte field for unsolicited CSM data. */ /* */ #define TXDB$M_CSM_TRAP_FLAG 0x80 struct csm_unsolicited_data { __union { unsigned char txdb$b_csm_data; __struct { unsigned txdb$v_halt_code : 7; /* Halt code if flag=1 */ unsigned txdb$v_csm_trap_flag : 1; /* 0=TOMM, 1=HALT */ } txdb$r_fill_76; } txdb$r_fill_75; } ; #if !defined(__VAXC) && !defined(VAXC) #define txdb$v_halt_code txdb$r_fill_75.txdb$r_fill_76.txdb$v_halt_code #define txdb$v_csm_trap_flag txdb$r_fill_75.txdb$r_fill_76.txdb$v_csm_trap_flag #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #ifdef __cplusplus } #endif #pragma standard #endif /* __PR8NNDEF_LOADED */