/********************************************************************************************************************************/ /* Created: 15-MAR-2001 23:38:07 by OpenVMS SDL EV1-33 */ /* Source: 15-MAR-2001 23:34:16 _$11$DUA933:[BUILD.SDL]STARDEFMP.SDI;1 */ /********************************************************************************************************************************/ /*** MODULE $PR46DEF ***/ #ifndef __PR46DEF_LOADED #define __PR46DEF_LOADED 1 #pragma nostandard #ifdef __cplusplus extern "C" { #define __unknown_params ... #else #define __unknown_params #endif #if !defined(__VAXC) && !defined(VAXC) #define __struct struct #define __union union #else #define __struct variant_struct #define __union variant_union #endif #define PR46$_ICCS 24 #define PR46$_MCESR 38 #define PR46$_ACCS 40 #define PR46$_SAVPC 42 #define PR46$_SAVPSL 43 #define PR46$_TBTAG 47 #define PR46$_TBDATA 59 #define PR46$_VINTSR 123 #define PR46$_PCTAG 124 #define PR46$_PCIDX 125 #define PR46$_PCERR 126 #define PR46$_PCSTS 127 #define PR46$M_ICCS_IE 0x40 struct pr46_iccs { __union { __struct { unsigned pr46$v_iccs_fill : 6; unsigned pr46$v_iccs_ie : 1; unsigned pr46$v_fill_60 : 1; } pr46$r_iccs_bits; } pr46$r_iccs_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_iccs_ie pr46$r_iccs_overlay.pr46$r_iccs_bits.pr46$v_iccs_ie #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_ACCS_VECTOR 0x1 #define PR46$M_ACCS_FCHIP 0x2 #define PR46$M_ACCS_MODE 0x4 #define PR46$M_ACCS_WEP 0x80000000 struct pr46_accs { __union { __struct { unsigned pr46$v_accs_vector : 1; unsigned pr46$v_accs_fchip : 1; unsigned pr46$v_accs_mode : 1; unsigned pr46$v_accs_fill1 : 28; unsigned pr46$v_accs_wep : 1; } pr46$r_accs_bits; } pr46$r_accs_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_accs_vector pr46$r_accs_overlay.pr46$r_accs_bits.pr46$v_accs_vector #define pr46$v_accs_fchip pr46$r_accs_overlay.pr46$r_accs_bits.pr46$v_accs_fchip #define pr46$v_accs_mode pr46$r_accs_overlay.pr46$r_accs_bits.pr46$v_accs_mode #define pr46$v_accs_wep pr46$r_accs_overlay.pr46$r_accs_bits.pr46$v_accs_wep #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_SAVPSL_HLTCOD 0x3F00 #define PR46$M_SAVPSL_INVAL 0x4000 #define PR46$M_SAVPSL_MAPEN 0x8000 struct pr46_savpsl { __union { __struct { unsigned pr46$v_savpsl_fill1 : 8; unsigned pr46$v_savpsl_hltcod : 6; unsigned pr46$v_savpsl_inval : 1; unsigned pr46$v_savpsl_mapen : 1; } pr46$r_savpsl_bits; } pr46$r_savpsl_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_savpsl_hltcod pr46$r_savpsl_overlay.pr46$r_savpsl_bits.pr46$v_savpsl_hltcod #define pr46$v_savpsl_inval pr46$r_savpsl_overlay.pr46$r_savpsl_bits.pr46$v_savpsl_inval #define pr46$v_savpsl_mapen pr46$r_savpsl_overlay.pr46$r_savpsl_bits.pr46$v_savpsl_mapen #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_TBTAG_VPN 0xFFFFFE00 struct pr46_tbtag { __union { __struct { unsigned pr46$v_tbtag_fill1 : 9; unsigned pr46$v_tbtag_vpn : 23; } pr46$r_tbtag_bits; } pr46$r_tbtag_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_tbtag_vpn pr46$r_tbtag_overlay.pr46$r_tbtag_bits.pr46$v_tbtag_vpn #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_TBDATA_PFN 0x1FFFFF #define PR46$M_TBDATA_M 0x4000000 #define PR46$M_TBDATA_PROT 0x78000000 #define PR46$M_TBDATA_V 0x80000000 struct pr46_tbdata { __union { __struct { unsigned pr46$v_tbdata_pfn : 21; unsigned pr46$v_tbdata_fill1 : 5; unsigned pr46$v_tbdata_m : 1; unsigned pr46$v_tbdata_prot : 4; unsigned pr46$v_tbdata_v : 1; } pr46$r_tbdata_bits; } pr46$r_tbdata_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_tbdata_pfn pr46$r_tbdata_overlay.pr46$r_tbdata_bits.pr46$v_tbdata_pfn #define pr46$v_tbdata_m pr46$r_tbdata_overlay.pr46$r_tbdata_bits.pr46$v_tbdata_m #define pr46$v_tbdata_prot pr46$r_tbdata_overlay.pr46$r_tbdata_bits.pr46$v_tbdata_prot #define pr46$v_tbdata_v pr46$r_tbdata_overlay.pr46$r_tbdata_bits.pr46$v_tbdata_v #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_PCTAG_TAG 0x1FFFF800 #define PR46$M_PCTAG_PARITY 0x40000000 #define PR46$M_PCTAG_VALID 0x80000000 struct pr46_pctag { __union { __struct { unsigned pr46$v_pctag_fill1 : 11; unsigned pr46$v_pctag_tag : 18; unsigned pr46$v_pctag_fill2 : 1; unsigned pr46$v_pctag_parity : 1; unsigned pr46$v_pctag_valid : 1; } pr46$r_pctag_bits; } pr46$r_pctag_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_pctag_tag pr46$r_pctag_overlay.pr46$r_pctag_bits.pr46$v_pctag_tag #define pr46$v_pctag_parity pr46$r_pctag_overlay.pr46$r_pctag_bits.pr46$v_pctag_parity #define pr46$v_pctag_valid pr46$r_pctag_overlay.pr46$r_pctag_bits.pr46$v_pctag_valid #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_PCIDX_INDEX 0x7F8 struct pr46_pcidx { __union { __struct { unsigned pr46$v_pcidx_fill1 : 3; unsigned pr46$v_pcidx_index : 8; unsigned pr46$v_pcidx_fill2 : 21; } pr46$r_pcidx_bits; } pr46$r_pcidx_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_pcidx_index pr46$r_pcidx_overlay.pr46$r_pcidx_bits.pr46$v_pcidx_index #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_PCERR_ADDR 0x3FFFFFFF struct pr46_pcerr { __union { __struct { unsigned pr46$v_pcerr_addr : 30; unsigned pr46$v_pcerr_fill1 : 2; } pr46$r_pcerr_bits; } pr46$r_pcerr_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_pcerr_addr pr46$r_pcerr_overlay.pr46$r_pcerr_bits.pr46$v_pcerr_addr #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #define PR46$M_PCSTS_FORCE_HIT 0x1 #define PR46$M_PCSTS_ENA_PTS 0x2 #define PR46$M_PCSTS_FLUSH 0x4 #define PR46$M_PCSTS_ENA_RFR 0x8 #define PR46$M_PCSTS_PC_HIT 0x10 #define PR46$M_PCSTS_INT 0x20 #define PR46$M_PCSTS_TRAP2 0x40 #define PR46$M_PCSTS_TRAP1 0x80 #define PR46$M_PCSTS_TAG_PE 0x100 #define PR46$M_PCSTS_RDAL_PE 0x200 #define PR46$M_PCSTS_DATA_PE 0x400 #define PR46$M_PCSTS_BUS_ERR 0x800 #define PR46$M_PCSTS_BC_HIT 0x1000 struct pr46_pcsts { __union { __struct { unsigned pr46$v_pcsts_force_hit : 1; unsigned pr46$v_pcsts_ena_pts : 1; unsigned pr46$v_pcsts_flush : 1; unsigned pr46$v_pcsts_ena_rfr : 1; unsigned pr46$v_pcsts_pc_hit : 1; unsigned pr46$v_pcsts_int : 1; unsigned pr46$v_pcsts_trap2 : 1; unsigned pr46$v_pcsts_trap1 : 1; unsigned pr46$v_pcsts_tag_pe : 1; unsigned pr46$v_pcsts_rdal_pe : 1; unsigned pr46$v_pcsts_data_pe : 1; unsigned pr46$v_pcsts_bus_err : 1; unsigned pr46$v_pcsts_bc_hit : 1; unsigned pr46$v_pcsts_fill1 : 19; } pr46$r_pcsts_bits; } pr46$r_pcsts_overlay; } ; #if !defined(__VAXC) && !defined(VAXC) #define pr46$v_pcsts_force_hit pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_force_hit #define pr46$v_pcsts_ena_pts pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_ena_pts #define pr46$v_pcsts_flush pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_flush #define pr46$v_pcsts_ena_rfr pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_ena_rfr #define pr46$v_pcsts_pc_hit pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_pc_hit #define pr46$v_pcsts_int pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_int #define pr46$v_pcsts_trap2 pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_trap2 #define pr46$v_pcsts_trap1 pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_trap1 #define pr46$v_pcsts_tag_pe pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_tag_pe #define pr46$v_pcsts_rdal_pe pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_rdal_pe #define pr46$v_pcsts_data_pe pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_data_pe #define pr46$v_pcsts_bus_err pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_bus_err #define pr46$v_pcsts_bc_hit pr46$r_pcsts_overlay.pr46$r_pcsts_bits.pr46$v_pcsts_bc_hit #endif /* #if !defined(__VAXC) && !defined(VAXC) */ #ifdef __cplusplus } #endif #pragma standard #endif /* __PR46DEF_LOADED */