!*** MODULE $PR1701DEF ***
CDEC$ OPTIONS /NOALIGN
	PARAMETER PR1701$K_REVISION = '00000001'X !  Revision number of this file
!  In the definitions below, registers are annotated with one of the following
!  symbols:
! 
!       RW - The register may be read and written
!   	RO - The register may only be read
!   	WO - The register may only be written
! 
!  For RO and WO registers, all bits and fields within the register are also
!  read-only or write-only.  For RW registers, each bit or field within
!  the register is annotated with one of the following:
! 
!   	RW - The bit/field may be read and written
!   	RO - The bit/field may be read; writes are ignored
!   	WO - The bit/field may be written; reads return an UNPREDICTABLE result.
!   	WZ - The bit/field may be written; reads return a 0
!   	WC - The bit/field may be read; writes cause state to clear
!   	RC - The bit/field may be read, which also causes state to clear; writes are ignored
	PARAMETER PR1701$_IPL = '00000012'X	!  Interrupt Priority Level
	PARAMETER PR1701$_ICCS = '00000018'X	!  Interval Clock Control/Status
	PARAMETER PR1701$_NICR = '00000019'X	!  Next Interval Count
	PARAMETER PR1701$_ICR = '0000001A'X	!  Interval Count
	PARAMETER PR1701$_TODR = '0000001B'X	!  Time Of Year Register (RW)
	PARAMETER PR1701$_MCESR = '00000026'X	!  Machine check error register (WO)
	PARAMETER PR1701$_SAVPC = '0000002A'X	!  Console saved PC (RO)
	PARAMETER PR1701$_SAVPSL = '0000002B'X	!  Console saved PSL (RO)
	PARAMETER PR17_SAVPSL$M_PSL_LO = '000000FF'X
	PARAMETER PR17_SAVPSL$M_HALTCODE = '00003F00'X
	PARAMETER PR17_SAVPSL$K_HALT_HLTPIN = '00000002'X !  HALT_L pin asserted
	PARAMETER PR17_SAVPSL$K_HALT_PWRUP = '00000003'X !  Initial powerup
	PARAMETER PR17_SAVPSL$K_HALT_INTSTK = '00000004'X !  Interrupt stack not valid
	PARAMETER PR17_SAVPSL$K_HALT_DOUBLE = '00000005'X !  Machine check during exception processing
	PARAMETER PR17_SAVPSL$K_HALT_HLTINS = '00000006'X !  Halt instruction in kernel mode
	PARAMETER PR17_SAVPSL$K_HALT_ILLVEC = '00000007'X !  Illegal SCB vector (bits<1:0>=11)
	PARAMETER PR17_SAVPSL$K_HALT_WCSVEC = '00000008'X !  WCS SCB vector (bits<1:0>=10)
	PARAMETER PR17_SAVPSL$K_HALT_CHMFI = '0000000A'X !  CHMx on interrupt stack
	PARAMETER PR17_SAVPSL$K_HALT_IE0 = '00000010'X !  ACV/TNV during machine check processing
	PARAMETER PR17_SAVPSL$K_HALT_IE1 = '00000011'X !  ACV/TNV during KSNV processing
	PARAMETER PR17_SAVPSL$K_HALT_IE2 = '00000012'X !  Machine check during machine check processing
	PARAMETER PR17_SAVPSL$K_HALT_IE3 = '00000013'X !  Machine check during KSNV processing
	PARAMETER PR17_SAVPSL$K_HALT_IE_PSL_101 = '00000019'X !  PSL<26:24>=101 during interrupt or exception
	PARAMETER PR17_SAVPSL$K_HALT_IE_PSL_110 = '0000001A'X !  PSL<26:24>=110 during interrupt or exception
	PARAMETER PR17_SAVPSL$K_HALT_IE_PSL_111 = '0000001B'X !  PSL<26:24>=111 during interrupt or exception
	PARAMETER PR17_SAVPSL$K_HALT_REI_PSL_101 = '0000001D'X !  PSL<26:24>=101 during REI
	PARAMETER PR17_SAVPSL$K_HALT_REI_PSL_110 = '0000001E'X !  PSL<26:24>=110 during REI
	PARAMETER PR17_SAVPSL$K_HALT_REI_PSL_111 = '0000001F'X !  PSL<26:24>=111 during REI
	PARAMETER PR17_SAVPSL$M_INVALID = '00004000'X
	PARAMETER PR17_SAVPSL$M_MAPEN = '00008000'X
	PARAMETER PR17_SAVPSL$M_PSL_HI = 'FFFF0000'X
	PARAMETER PR1701$_IORESET = '00000037'X	!  I/O system reset register (WO)
	PARAMETER PR1701$_PME = '0000003D'X	!  Performance monitoring enable (RW)
!  System-level required registers.
	PARAMETER PR1701$_IAK14 = '00000040'X	!  Level 14 interrupt acknowledge (RO)
	PARAMETER PR1701$_IAK15 = '00000041'X	!  Level 15 interrupt acknowledge (RO)
	PARAMETER PR1701$_IAK16 = '00000042'X	!  Level 16 interrupt acknowledge (RO)
	PARAMETER PR1701$_IAK17 = '00000043'X	!  Level 17 interrupt acknowledge (RO)
	PARAMETER IAK$M_IPL17 = '00000001'X
	PARAMETER IAK$M_PR = '00000002'X
	PARAMETER IAK$M_SCB_OFFSET = '0000FFFC'X
	PARAMETER PR1701$_CWB = '00000044'X	!  Clear write buffers (RW)
	PARAMETER PR1701$_LMBOX = '00000079'X	!  Laser Mailbox
!  Ebox registers.
	PARAMETER PR1701$_INTSYS = '0000007A'X	!  Interrupt system status register (RW)
	PARAMETER INTSYS$M_ICCS6 = '00000001'X
	PARAMETER INTSYS$M_SISR = '0000FFFE'X
	PARAMETER INTSYS$M_INT_ID = '001F0000'X
	PARAMETER INTSYS$K_INT_ID_HALT = '0000001F'X !  Halt pin
	PARAMETER INTSYS$K_INT_ID_PWRFL = '0000001E'X !  Power fail
	PARAMETER INTSYS$K_INT_ID_H_ERR = '0000001D'X !  Hard error
	PARAMETER INTSYS$K_INT_ID_INT_TIM = '0000001C'X !  Interval timer
	PARAMETER INTSYS$K_INT_ID_PMON = '0000001B'X !  Performance monitor
	PARAMETER INTSYS$K_INT_ID_S_ERR = '0000001A'X !  Soft error
	PARAMETER INTSYS$K_INT_ID_IRQ3 = '00000017'X !  IPL 17 device interrupt
	PARAMETER INTSYS$K_INT_ID_IRQ2 = '00000016'X !  IPL 16 device interrupt
	PARAMETER INTSYS$K_INT_ID_IRQ1 = '00000015'X !  IPL 15 device interrupt
	PARAMETER INTSYS$K_INT_ID_IRQ0 = '00000014'X !  IPL 14 device interrupt
	PARAMETER INTSYS$K_INT_ID_SISR15 = '0000000F'X !  SISR<15>
	PARAMETER INTSYS$K_INT_ID_SISR14 = '0000000E'X !  SISR<14>
	PARAMETER INTSYS$K_INT_ID_SISR13 = '0000000D'X !  SISR<13>
	PARAMETER INTSYS$K_INT_ID_SISR12 = '0000000C'X !  SISR<12>
	PARAMETER INTSYS$K_INT_ID_SISR11 = '0000000B'X !  SISR<11>
	PARAMETER INTSYS$K_INT_ID_SISR10 = '0000000A'X !  SISR<10>
	PARAMETER INTSYS$K_INT_ID_SISR9 = '00000009'X !  SISR<9>
	PARAMETER INTSYS$K_INT_ID_SISR8 = '00000008'X !  SISR<8>
	PARAMETER INTSYS$K_INT_ID_SISR7 = '00000007'X !  SISR<7>
	PARAMETER INTSYS$K_INT_ID_SISR6 = '00000006'X !  SISR<6>
	PARAMETER INTSYS$K_INT_ID_SISR5 = '00000005'X !  SISR<5>
	PARAMETER INTSYS$K_INT_ID_SISR4 = '00000004'X !  SISR<4>
	PARAMETER INTSYS$K_INT_ID_SISR3 = '00000003'X !  SISR<3>
	PARAMETER INTSYS$K_INT_ID_SISR2 = '00000002'X !  SISR<2>
	PARAMETER INTSYS$K_INT_ID_SISR1 = '00000001'X !  SISR<1>
	PARAMETER INTSYS$K_INT_ID_NO_INT = '00000000'X !  No interrupt
	PARAMETER INTSYS$M_INT_TIM_RESET = '01000000'X
	PARAMETER INTSYS$M_S_ERR_RESET = '08000000'X
	PARAMETER INTSYS$M_PMON_RESET = '10000000'X
	PARAMETER INTSYS$M_H_ERR_RESET = '20000000'X
	PARAMETER INTSYS$M_PWRFL_RESET = '40000000'X
	PARAMETER INTSYS$M_HALT_RESET = '80000000'X
	PARAMETER PR1701$_PMFCNT = '0000007B'X	!  Performance monitoring facility count register (RW)
	PARAMETER PMFCNT$M_PMCTR0 = '0000FFFF'X
	PARAMETER PMFCNT$M_PMCTR1 = 'FFFF0000'X
	PARAMETER PR1701$_PCSCR = '0000007C'X	!  Patchable control store control register (WO)
	PARAMETER PCSCR$M_PAR_PORT_DIS = '00000100'X
	PARAMETER PCSCR$M_PCS_ENB = '00000200'X
	PARAMETER PCSCR$M_PCS_WRITE = '00000400'X
	PARAMETER PCSCR$M_RWL_SHIFT = '00000800'X
	PARAMETER PCSCR$M_DATA = '00001000'X
	PARAMETER PCSCR$M_NONSTANDARD_PATCH = '00800000'X
	PARAMETER PCSCR$M_PATCH_REV = '1F000000'X
	PARAMETER PR1701$_ECR = '0000007D'X	!  Ebox control register (RW)
	PARAMETER ECR$M_VECTOR_PRESENT = '00000001'X
	PARAMETER ECR$M_FBOX_ENABLE = '00000002'X
	PARAMETER ECR$M_TIMEOUT_EXT = '00000004'X
	PARAMETER ECR$M_FBOX_ST4_BYPASS_ENABLE = '00000008'X
	PARAMETER ECR$M_TIMEOUT_OCCURRED = '00000010'X
	PARAMETER ECR$M_TIMEOUT_TEST = '00000020'X
	PARAMETER ECR$M_TIMEOUT_CLOCK = '00000040'X
	PARAMETER ECR$M_FBOX_TEST_ENABLE = '00002000'X
	PARAMETER ECR$M_PMF_ENABLE = '00010000'X
	PARAMETER ECR$M_PMF_PMUX = '00060000'X
	PARAMETER ECR$K_PMUX_IBOX = '00000000'X	!  Select Ibox
	PARAMETER ECR$K_PMUX_EBOX = '00000001'X	!  Select Ebox
	PARAMETER ECR$K_PMUX_MBOX = '00000002'X	!  Select Mbox
	PARAMETER ECR$K_PMUX_CBOX = '00000003'X	!  Select Cbox
	PARAMETER ECR$M_PMF_EMUX = '00380000'X
	PARAMETER ECR$K_EMUX_S3_STALL = '00000000'X !  Measure S3 stall against total cycles
	PARAMETER ECR$K_EMUX_EM_PA_STALL = '00000001'X !  Measure EM+PA queue stall against total cycles
	PARAMETER ECR$K_EMUX_CPI = '00000002'X	!  Measure instructions retired against total cycles
	PARAMETER ECR$K_EMUX_STALL = '00000003'X !  Measure total stalls against total cycles
	PARAMETER ECR$K_EMUX_S3_STALL_PCT = '00000004'X !  Measure S3 stall against total stalls
	PARAMETER ECR$K_EMUX_EM_PA_STALL_PCT = '00000005'X !  Measure EM+PA queue stall against total stalls
	PARAMETER ECR$K_EMUX_UWORD = '00000007'X !  Count microword increments
	PARAMETER ECR$M_PMF_LFSR = '00400000'X
	PARAMETER ECR$M_PMF_CLEAR = '80000000'X
	PARAMETER PR1701$_MTBTAG = '0000007E'X	!  Mbox TB tag fill (WO)
	PARAMETER MTBTAG$M_TP = '00000001'X
	PARAMETER MTBTAG$M_VPN = 'FFFFFE00'X
	PARAMETER PR1701$_MTBPTE = '0000007F'X	!  Mbox TB PTE fill (WO)
	PARAMETER MTBPTE$M_PFN = '007FFFFF'X
	PARAMETER MTBPTE$M_P = '01000000'X
	PARAMETER MTBPTE$M_M = '04000000'X
	PARAMETER MTBPTE$M_PROT = '18000000'X
	PARAMETER MTBPTE$M_V = '20000000'X
	PARAMETER PR1701$_VPSR = '00000090'X	!  Vector processor status register (RW)
	PARAMETER PR17_VPSR$M_VEN = '00000001'X
	PARAMETER PR17_VPSR$M_RST = '00000002'X
	PARAMETER PR17_VPSR$M_AEX = '00000080'X
	PARAMETER PR17_VPSR$M_IMP = '01000000'X
	PARAMETER PR17_VPSR$M_BSY = '80000000'X
	PARAMETER PR1701$_VAER = '00000091'X	!  Vector arithmetic exception register (RO)
	PARAMETER PR17_VAER$M_F_UNDF = '00000001'X
	PARAMETER PR17_VAER$M_F_DIVZ = '00000002'X
	PARAMETER PR17_VAER$M_F_ROPR = '00000004'X
	PARAMETER PR17_VAER$M_F_OVFL = '00000008'X
	PARAMETER PR17_VAER$M_I_OVFL = '00000020'X
	PARAMETER PR17_VAER$M_REGISTER_MASK = 'FFFF0000'X
	PARAMETER PR1701$_VMAC = '00000092'X	!  Vector memory activity register (RO)
	PARAMETER PR1701$_VTBIA = '00000093'X	!  Vector translation buffer invalidate all (WO)
!  Cbox registers.
	PARAMETER PR1701$_BIU_CTL = '000000A0'X	!  Cbox control register (RW)
	PARAMETER BIU_CTL$M_BC_EN = '00000001'X
	PARAMETER BIU_CTL$M_ECC = '00000002'X
	PARAMETER BIU_CTL$K_ECC_ECC = '00000001'X !   select ECC mode
	PARAMETER BIU_CTL$K_ECC_PARITY = '00000000'X !   select Parity mode
	PARAMETER BIU_CTL$M_OE = '00000004'X
	PARAMETER BIU_CTL$M_BC_FHIT = '00000008'X
	PARAMETER BIU_CTL$M_BC_SPD = '000000F0'X
	PARAMETER BIU_CTL$K_BC_SPD_2X = '00000000'X !  2x cpu cycle
	PARAMETER BIU_CTL$K_BC_SPD_3X = '00000001'X !  3x cpu cycle
	PARAMETER BIU_CTL$K_BC_SPD_4X = '00000002'X !  4x cpu cycle
	PARAMETER BIU_CTL$M_BC_SIZE = '70000000'X
	PARAMETER BIU_CTL$K_BC_SIZE_128KB = '00000000'X !   Select 128KB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_256KB = '00000001'X !   Select 256KB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_512KB = '00000002'X !   Select 512KB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_1MB = '00000003'X !   Select 1MB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_2MB = '00000004'X !   Select 2MB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_4MB = '00000005'X !   Select 4MB Bcache
	PARAMETER BIU_CTL$K_BC_SIZE_8MB = '00000006'X !   Select 8MB Bcache
	PARAMETER BIU_CTL$M_WS_IO = '80000000'X
	PARAMETER PR1701$_BC_TAG = '000000A2'X	!  Bcache error tag (RO)
	PARAMETER BC_TAG$M_HIT = '00000001'X
	PARAMETER BC_TAG$M_CTL_P = '00000002'X
	PARAMETER BC_TAG$M_CTL_S = '00000004'X
	PARAMETER BC_TAG$M_CTL_D = '00000008'X
	PARAMETER BC_TAG$M_CTL_V = '00000010'X
	PARAMETER BC_TAG$M_TAG_P = '00400000'X
	PARAMETER PR1701$_BIU_STAT = '000000A4'X !  Bcache error data status (W1C)
	PARAMETER BIU_STAT$M_BIU_HERR = '00000001'X
	PARAMETER BIU_STAT$M_BIU_SERR = '00000002'X
	PARAMETER BIU_STAT$M_BC_TPERR = '00000004'X
	PARAMETER BIU_STAT$M_BC_TCPERR = '00000008'X
	PARAMETER BIU_STAT$M_BIU_DSP_CMD = '00000070'X
	PARAMETER BIU_STAT$K_WRITE_UNLOCK_IO = '00000000'X !  WRITE_UNLOCK_IO cmd
	PARAMETER BIU_STAT$K_IREAD = '00000001'X !  IREAD cmd
	PARAMETER BIU_STAT$K_WRITE_UNLOCK = '00000002'X !  WRITE_UNLOCK cmd
	PARAMETER BIU_STAT$K_WRITE = '00000003'X !  WRITE cmd
	PARAMETER BIU_STAT$K_DREAD = '00000004'X !  DREAD cmd
	PARAMETER BIU_STAT$K_DREAD_IO = '00000005'X !  DREAD_IO cmd
	PARAMETER BIU_STAT$K_DREAD_LOCK = '00000006'X !  DREAD_LOCK cmd
	PARAMETER BIU_STAT$M_BIU_SEO = '00000080'X
	PARAMETER BIU_STAT$M_FILL_ECC = '00000100'X
	PARAMETER BIU_STAT$M_FILL_CRD = '00000200'X
	PARAMETER BIU_STAT$M_BIU_DPERR = '00000400'X
	PARAMETER BIU_STAT$M_FILL_IRD = '00000800'X
	PARAMETER BIU_STAT$M_FILL_SEO = '00004000'X
	PARAMETER BIU_STAT$M_RAZ = '00008000'X
	PARAMETER BIU_STAT$M_FILL_DSP_CMD = '000F0000'X
	PARAMETER BIU_STAT$K_F_IREAD = '00000002'X !  IREAD cmd
	PARAMETER BIU_STAT$K_IREAD_IO = '00000003'X !  IREAD_IO cmd
	PARAMETER BIU_STAT$K_F_WRITE_UNLOCK_IO = '00000004'X !  WRITE_UNLOCK_IO cmd
	PARAMETER BIU_STAT$K_WRITE_IO = '00000005'X !  WRITE_IO cmd
	PARAMETER BIU_STAT$K_F_WRITE = '00000006'X !  WRITE cmd
	PARAMETER BIU_STAT$K_F_WRITE_UNLOCK = '00000007'X !  WRITE_UNLOCK cmd
	PARAMETER BIU_STAT$K_F_DREAD = '00000008'X !  DREAD cmd 100X
	PARAMETER BIU_STAT$K_F_DREAD2 = '00000009'X !  DREAD cmd 100X
	PARAMETER BIU_STAT$K_F_DREAD_IO = '0000000A'X !  DREAD_IO cmd
	PARAMETER BIU_STAT$K_F_DREAD_LOCK = '0000000C'X !  DREAD_LOCK cmd
	PARAMETER BIU_STAT$K_DREAD_LOCK_IO = '0000000D'X !  DREAD_LOCK_IO cmd
	PARAMETER BIU_STAT$M_LST_WRT = '00100000'X
	PARAMETER BIU_STAT$M_RSVD = '0FE00000'X
	PARAMETER BIU_STAT$M_BIU_ADDR = '30000000'X
	PARAMETER BIU_STAT$M_FILL_ADDR = 'C0000000'X
	PARAMETER PR1701$_BIU_ADDR = '000000A6'X !  error address associated with BIU errors (RO)
	PARAMETER PR1701$_FILL_SYN = '000000A8'X !  Syndrome bits associated with bad quadword during fill (RO)
	PARAMETER PR1701$_FILL_ADDR = '000000AA'X !  error address associated with FILL errors (RO)
	PARAMETER PR1701$_STC_RESULT = '000000AC'X !  Result of last store conditional (RO)
	PARAMETER STC_RESULT$M_PASS = '00000004'X
	PARAMETER PR1701$_BEDECC = '000000AE'X	!  Alternate source of ECC check bits (W)
	PARAMETER PR1701$_CHALT = '000000B0'X	!  Console HALT register (RW)
	PARAMETER PR1701$_SIO = '000000B2'X	!  Seral line I/O register (RW) 
	PARAMETER SIO$M_SIO_IN = '00000001'X
	PARAMETER SIO$M_SIO_OUT = '00000002'X
	PARAMETER PR1701$_SIO_IE = '000000B4'X	!  Seral line I/O register (RW) 
	PARAMETER SIO$M_SROM_OE = '00000001'X
	PARAMETER SIO$M_SROM_FAST = '00000002'X
	PARAMETER PR1701$_QW_PACK = '000000B8'X	!  Pack next two longword writes (WO)
	PARAMETER PR1701$_CLR_IO_PACK = '000000B9'X !  Clear QW IO Pack (W)
!  Ibox registers.
	PARAMETER PR1701$_VMAR = '000000D0'X	!  VIC memory address register
	PARAMETER VMAR$M_LW = '00000004'X
	PARAMETER VMAR$M_SUB_BLOCK = '00000018'X
	PARAMETER VMAR$M_ROW_INDEX = '000007E0'X
	PARAMETER VMAR$M_ADDR = 'FFFFF800'X
	PARAMETER PR1701$_VTAG = '000000D1'X	!  VIC tag register
	PARAMETER VTAG$M_V = '0000000F'X
	PARAMETER VTAG$M_DP = '000000F0'X
	PARAMETER VTAG$M_TP = '00000100'X
	PARAMETER VTAG$M_TAG = 'FFFFF800'X
	PARAMETER PR1701$_VDATA = '000000D2'X	!  VIC data register
	PARAMETER PR1701$_ICSR = '000000D3'X	!  Ibox control and status register (RW)
	PARAMETER ICSR$M_ENABLE = '00000001'X
	PARAMETER ICSR$M_LOCK = '00000004'X
	PARAMETER ICSR$M_DPERR = '00000008'X
	PARAMETER ICSR$M_TPERR = '00000010'X
	PARAMETER PR1701$_BPCR = '000000D4'X	!  Ibox branch prediction control register
	PARAMETER BPCR$M_HISTORY = '0000000F'X
	PARAMETER BPCR$M_MISPREDICT = '00000020'X
	PARAMETER BPCR$M_FLUSH_BHT = '00000040'X
	PARAMETER BPCR$M_FLUSH_CTR = '00000080'X
	PARAMETER BPCR$M_LOAD_HISTORY = '00000100'X
	PARAMETER BPCR$M_BPU_ALGORITHM = 'FFFF0000'X
	PARAMETER BPCR$K_BPU_ALGORITHM = '0000FECA'X !  default value for BPU_ALGORITHM field
	PARAMETER PR1701$_BPC = '000000D6'X	!  Ibox Backup PC (RO)
	PARAMETER PR1701$_BPCUNW = '000000D7'X	!  Ibox Backup PC with RLOG unwind (RO)
!  Mbox internal memory management registers.
	PARAMETER PR1701$_MP0BR = '000000E0'X	!  Mbox P0 base register (RW)
	PARAMETER PR1701$_MP0LR = '000000E1'X	!  Mbox P0 length register (RW)
	PARAMETER PR1701$_MP1BR = '000000E2'X	!  Mbox P1 base register (RW)
	PARAMETER PR1701$_MP1LR = '000000E3'X	!  Mbox P1 length register (RW)
	PARAMETER PR1701$_MSBR = '000000E4'X	!  Mbox system base register (RW)
	PARAMETER PR1701$_MSLR = '000000E5'X	!  Mbox system length register (RW)
	PARAMETER PR1701$_MMAPEN = '000000E6'X	!  Mbox memory management enable (RW)
!  Mbox registers.
	PARAMETER PR1701$_PAMODE = '000000E7'X	!  Mbox physical address mode (RW)
	PARAMETER PR1701_PAMODE$M_MODE = '00000001'X
	PARAMETER PR1701_PAMODE$K_PA_30 = '00000000'X !  30-bit PA mode
	PARAMETER PR1701_PAMODE$K_PA_32 = '00000001'X !  32-bit PA mode
	PARAMETER PR1701$_MMEADR = '000000E8'X	!  Mbox memory management fault address (RO)
	PARAMETER PR1701$_MMEPTE = '000000E9'X	!  Mbox memory management fault PTE address (RO)
	PARAMETER PR1701$_MMESTS = '000000EA'X	!  Mbox memory management fault status (RO)
	PARAMETER MMESTS$M_LV = '00000001'X
	PARAMETER MMESTS$M_PTE_REF = '00000002'X
	PARAMETER MMESTS$M_M = '00000004'X
	PARAMETER MMESTS$M_FAULT = '0000C000'X
	PARAMETER MMESTS$K_FAULT_ACV = '00000001'X !  ACV fault
	PARAMETER MMESTS$K_FAULT_TNV = '00000002'X !  TNV fault
	PARAMETER MMESTS$K_FAULT_M0 = '00000003'X !  M=0 fault
	PARAMETER MMESTS$M_SRC = '1C000000'X
	PARAMETER MMESTS$M_LOCK = 'E0000000'X
	PARAMETER PR1701$_TBADR = '000000EC'X	!  Mbox TB parity error address (RO)
	PARAMETER PR1701$_TBSTS = '000000ED'X	!  Mbox TB parity error status (RW)
	PARAMETER TBSTS$M_LOCK = '00000001'X
	PARAMETER TBSTS$M_DPERR = '00000002'X
	PARAMETER TBSTS$M_TPERR = '00000004'X
	PARAMETER TBSTS$M_EM_VAL = '00000008'X
	PARAMETER TBSTS$M_CMD = '000001F0'X
	PARAMETER TBSTS$M_SRC = 'E0000000'X
	PARAMETER MSRC$K_IREF_LATCH = '00000006'X !  Source of fault was IREF latch
	PARAMETER MSRC$K_SPEC_QUEUE = '00000004'X !  Source of fault was spec queue
	PARAMETER MSRC$K_EM_LATCH = '00000000'X	!  Source of fault was EM latch
!  Mbox Pcache registers  
	PARAMETER PR1701$_PCADR = '000000F2'X	!  Mbox Pcache parity error address (RO)
	PARAMETER PR1701$_PCSTS = '000000F4'X	!  Mbox Pcache parity error status (RW)
	PARAMETER PCSTS$M_LOCK = '00000001'X
	PARAMETER PCSTS$M_DPERR = '00000002'X
	PARAMETER PCSTS$M_RIGHT_BANK = '00000004'X
	PARAMETER PCSTS$M_LEFT_BANK = '00000008'X
	PARAMETER PCSTS$M_CMD = '000001F0'X
	PARAMETER PCSTS$M_PTE_ER_WR = '00000200'X
	PARAMETER PCSTS$M_PTE_ER = '00000400'X
	PARAMETER PR1701$_PCCTL = '000000F8'X	!  Mbox Pcache control (RW)
	PARAMETER PCCTL$M_D_ENABLE = '00000001'X
	PARAMETER PCCTL$M_I_ENABLE = '00000002'X
	PARAMETER PCCTL$M_FORCE_HIT = '00000004'X
	PARAMETER PCCTL$M_BANK_SEL = '00000008'X
	PARAMETER PCCTL$M_P_ENABLE = '00000010'X
	PARAMETER PCCTL$M_PMM = '000000E0'X
	PARAMETER PCCTL$M_ELEC_DISABLE = '00000100'X
	PARAMETER PCCTL$M_RED_ENABLE = '00000200'X
	PARAMETER PR1701$_PCTAG = '01800000'X	!  First of 256 Pcache tag IPRs (RW)
	PARAMETER PR1701$_PCTAG_MAX = '01801FE0'X !  Last of 256 Pcache tag IPRs
	PARAMETER PCTAG$K_IPR_INCR = '00000020'X !  Increment between Pcache tag IPR numbers
	PARAMETER PR17_PCTAG$M_A = '00000001'X
	PARAMETER PR17_PCTAG$M_V = '0000001E'X
	PARAMETER PR17_PCTAG$M_P = '00000020'X
	PARAMETER PR17_PCTAG$M_TAG = '01FFF000'X
	PARAMETER PCTAGA$M_INDEX = '00000FE0'X
	PARAMETER PCTAGA$M_B = '00001000'X
	PARAMETER PR1701$_PCDAP = '01C00000'X	!  First of 1024 Pcache data parity IPRs (RW)
	PARAMETER PR1701$_PCDAP_MAX = '01C01FF8'X !  Last of 1024 Pcache data parity IPRs
	PARAMETER PCDAP$K_IPR_INCR = '00000008'X !  Increment between Pcache data parity IPR numbers
	PARAMETER PCDAP$M_DATA_PARITY = '000000FF'X
	STRUCTURE /PR1701DEF/
	UNION
!  Architecturally-defined registers which have different characteristics
!  on this CPU.
	    MAP
	        PARAMETER PR17_SAVPSL$S_PSL_LO = 8
	        PARAMETER PR17_SAVPSL$V_PSL_LO = 0	!  Saved PSL bits <7:0>
	        PARAMETER PR17_SAVPSL$S_HALTCODE = 6
	        PARAMETER PR17_SAVPSL$V_HALTCODE = 8	!  Halt code containing one of the following values
	        PARAMETER PR17_SAVPSL$S_INVALID = 1
	        PARAMETER PR17_SAVPSL$V_INVALID = 14	!  Invalid SAVPSL if = 1
	        PARAMETER PR17_SAVPSL$S_MAPEN = 1
	        PARAMETER PR17_SAVPSL$V_MAPEN = 15	!  MAPEN<0>
	        PARAMETER PR17_SAVPSL$S_PSL_HI = 16
	        PARAMETER PR17_SAVPSL$V_PSL_HI = 16
	        BYTE %FILL (4)				!  Saved PSL bits <31:16>
	    END MAP
!  These registers are for testability and diagnostics use only.
!  They should not be referenced in normal operation.
	    MAP
	        PARAMETER IAK$S_IPL17 = 1
	        PARAMETER IAK$V_IPL17 = 0		!  Force IPL 17, independent of actual level
	        PARAMETER IAK$S_PR = 1
	        PARAMETER IAK$V_PR = 1			!  Passive release
	        PARAMETER IAK$S_SCB_OFFSET = 14
	        PARAMETER IAK$V_SCB_OFFSET = 2		!  LW offset in SCB of interrupt vector
	    BYTE %FILL (2)
	    END MAP
!  Ebox register definition
	    MAP
	        PARAMETER INTSYS$S_ICCS6 = 1
	        PARAMETER INTSYS$V_ICCS6 = 0		!  ICCS<6> (RO)
	        PARAMETER INTSYS$S_SISR = 15
	        PARAMETER INTSYS$V_SISR = 1		!  SISR<15:1> (RO)
	        PARAMETER INTSYS$S_INT_ID = 5
	        PARAMETER INTSYS$V_INT_ID = 16		!  ID of highest pending interrupt (RO)
	        PARAMETER INTSYS$S_INT_TIM_RESET = 1
	        PARAMETER INTSYS$V_INT_TIM_RESET = 24	!  Interval timer interrupt reset (WC)
	        PARAMETER INTSYS$S_S_ERR_RESET = 1
	        PARAMETER INTSYS$V_S_ERR_RESET = 27	!  Soft error interrupt reset (WC)
	        PARAMETER INTSYS$S_PMON_RESET = 1
	        PARAMETER INTSYS$V_PMON_RESET = 28	!  Performance monitoring interrupt reset (WC)
	        PARAMETER INTSYS$S_H_ERR_RESET = 1
	        PARAMETER INTSYS$V_H_ERR_RESET = 29	!  Hard error interrupt reset (WC)
	        PARAMETER INTSYS$S_PWRFL_RESET = 1
	        PARAMETER INTSYS$V_PWRFL_RESET = 30	!  Power fail interrupt reset (WC)
	        PARAMETER INTSYS$S_HALT_RESET = 1
	        PARAMETER INTSYS$V_HALT_RESET = 31
	        BYTE %FILL (4)				!  Halt pin interrupt reset (WC)
	    END MAP
	    MAP
	        PARAMETER PMFCNT$S_PMCTR0 = 16
	        PARAMETER PMFCNT$V_PMCTR0 = 0		!  PMCTR0 word
	        PARAMETER PMFCNT$S_PMCTR1 = 16
	        PARAMETER PMFCNT$V_PMCTR1 = 16
	        BYTE %FILL (4)				!  PMCTR1 word
	    END MAP
	    MAP
	        PARAMETER PCSCR$S_PAR_PORT_DIS = 1
	        PARAMETER PCSCR$V_PAR_PORT_DIS = 8	!  Disable parallel port control of scan chain
	        PARAMETER PCSCR$S_PCS_ENB = 1
	        PARAMETER PCSCR$V_PCS_ENB = 9		!  Enable use of patchable control store
	        PARAMETER PCSCR$S_PCS_WRITE = 1
	        PARAMETER PCSCR$V_PCS_WRITE = 10	!  Write scan chain to patchable control store
	        PARAMETER PCSCR$S_RWL_SHIFT = 1
	        PARAMETER PCSCR$V_RWL_SHIFT = 11	!  Shift read-write latch scan chain by one bit
	        PARAMETER PCSCR$S_DATA = 1
	        PARAMETER PCSCR$V_DATA = 12		!  Data to be shifted into the PCS scan chain
	        PARAMETER PCSCR$S_NONSTANDARD_PATCH = 1
	        PARAMETER PCSCR$V_NONSTANDARD_PATCH = 23 !  Non-standard patch bit
	        PARAMETER PCSCR$S_PATCH_REV = 5
	        PARAMETER PCSCR$V_PATCH_REV = 24	!  Patch revision number
	    BYTE %FILL (2)
	    END MAP
	    MAP
	        PARAMETER ECR$S_VECTOR_PRESENT = 1
	        PARAMETER ECR$V_VECTOR_PRESENT = 0	!  Vector unit present (RW)
	        PARAMETER ECR$S_FBOX_ENABLE = 1
	        PARAMETER ECR$V_FBOX_ENABLE = 1		!  Fbox enabled (RW)
	        PARAMETER ECR$S_TIMEOUT_EXT = 1
	        PARAMETER ECR$V_TIMEOUT_EXT = 2		!  Select external timebase for S3 stall timeout timer (RW)
	        PARAMETER ECR$S_FBOX_ST4_BYPASS_ENABLE = 1
	        PARAMETER ECR$V_FBOX_ST4_BYPASS_ENABLE = 3 !  Fbox stage 4 conditional bypass enable (RW)
	        PARAMETER ECR$S_TIMEOUT_OCCURRED = 1
	        PARAMETER ECR$V_TIMEOUT_OCCURRED = 4	!  S3 stall timeout occurred (WC)
	        PARAMETER ECR$S_TIMEOUT_TEST = 1
	        PARAMETER ECR$V_TIMEOUT_TEST = 5	!  Select test mode for S3 stall timeout (RW)
	        PARAMETER ECR$S_TIMEOUT_CLOCK = 1
	        PARAMETER ECR$V_TIMEOUT_CLOCK = 6	!  Clock S3 timeout (RW)
	        PARAMETER ECR$S_FBOX_TEST_ENABLE = 1
	        PARAMETER ECR$V_FBOX_TEST_ENABLE = 13	!  Enable test of Fbox (RW)
	        PARAMETER ECR$S_PMF_ENABLE = 1
	        PARAMETER ECR$V_PMF_ENABLE = 16		!  Performance monitoring facility enable (RW)
	        PARAMETER ECR$S_PMF_PMUX = 2
	        PARAMETER ECR$V_PMF_PMUX = 17		!  Performance monitoring facility master select (RW)
	        PARAMETER ECR$S_PMF_EMUX = 3
	        PARAMETER ECR$V_PMF_EMUX = 19		!  Performance monitoring facility Ebox mux select (RW)
	        PARAMETER ECR$S_PMF_LFSR = 1
	        PARAMETER ECR$V_PMF_LFSR = 22		!  Performance monitoring facility Wbus LFSR enable (RW)
	        PARAMETER ECR$S_PMF_CLEAR = 1
	        PARAMETER ECR$V_PMF_CLEAR = 31
	        BYTE %FILL (2)				!  Clear performance monitoring hardware counters (WO)
	    END MAP
!  Mbox TB registers.
!  These registers are for testability and diagnostics use only.
!  They should not be referenced in normal operation.
	    MAP
	        PARAMETER MTBTAG$S_TP = 1
	        PARAMETER MTBTAG$V_TP = 0		!  Tag parity bit
	        PARAMETER MTBTAG$S_VPN = 23
	        PARAMETER MTBTAG$V_VPN = 9
	        BYTE %FILL (3)				!  Virtual page number of address (VA<31:9>)
	    END MAP
	    MAP
	        PARAMETER MTBPTE$S_PFN = 23
	        PARAMETER MTBPTE$V_PFN = 0		!  Page frame number (PA<31:9>)
	        PARAMETER MTBPTE$S_P = 1
	        PARAMETER MTBPTE$V_P = 24		!  PTE parity
	        PARAMETER MTBPTE$S_M = 1
	        PARAMETER MTBPTE$V_M = 26		!  Modify bit
	        PARAMETER MTBPTE$S_PROT = 2
	        PARAMETER MTBPTE$V_PROT = 27		!  Protection field
	        PARAMETER MTBPTE$S_V = 1
	        PARAMETER MTBPTE$V_V = 29		!  PTE valid bit
	    BYTE %FILL (4)
	    END MAP
!  Vector architecture registers
	    MAP
	        PARAMETER PR17_VPSR$S_VEN = 1
	        PARAMETER PR17_VPSR$V_VEN = 0		!  Vector processor enabled (RW)
	        PARAMETER PR17_VPSR$S_RST = 1
	        PARAMETER PR17_VPSR$V_RST = 1		!  Vector processor state reset (WO)
	        PARAMETER PR17_VPSR$S_AEX = 1
	        PARAMETER PR17_VPSR$V_AEX = 7		!  Vector arithmetic exception (WC)
	        PARAMETER PR17_VPSR$S_IMP = 1
	        PARAMETER PR17_VPSR$V_IMP = 24		!  Implementation-specific hardware error (WC)
	        PARAMETER PR17_VPSR$S_BSY = 1
	        PARAMETER PR17_VPSR$V_BSY = 31
	        BYTE %FILL (1)				!  Vector processor busy (RO)
	    END MAP
	    MAP
	        PARAMETER PR17_VAER$S_F_UNDF = 1
	        PARAMETER PR17_VAER$V_F_UNDF = 0	!  Floating underflow
	        PARAMETER PR17_VAER$S_F_DIVZ = 1
	        PARAMETER PR17_VAER$V_F_DIVZ = 1	!  Floating divide-by-zero
	        PARAMETER PR17_VAER$S_F_ROPR = 1
	        PARAMETER PR17_VAER$V_F_ROPR = 2	!  Floating reserved operand
	        PARAMETER PR17_VAER$S_F_OVFL = 1
	        PARAMETER PR17_VAER$V_F_OVFL = 3	!  Floating overflow
	        PARAMETER PR17_VAER$S_I_OVFL = 1
	        PARAMETER PR17_VAER$V_I_OVFL = 5	!  Integer overflow
	        PARAMETER PR17_VAER$S_REGISTER_MASK = 16
	        PARAMETER PR17_VAER$V_REGISTER_MASK = 16
	        BYTE %FILL (3)				!  Vector destination register mask
	    END MAP
	    MAP
	        PARAMETER BIU_CTL$S_BC_EN = 1
	        PARAMETER BIU_CTL$V_BC_EN = 0		!  Enable Bcache (WO)
	        PARAMETER BIU_CTL$S_ECC = 1
	        PARAMETER BIU_CTL$V_ECC = 1		!  ECC/Parity select (WO)
	        PARAMETER BIU_CTL$S_OE = 1
	        PARAMETER BIU_CTL$V_OE = 2		!  CE pins not asserted during RAM write cycles (WO)
	        PARAMETER BIU_CTL$S_BC_FHIT = 1
	        PARAMETER BIU_CTL$V_BC_FHIT = 3		!  Force Bcache hit (WO)
	        PARAMETER BIU_CTL$S_BC_SPD = 4
	        PARAMETER BIU_CTL$V_BC_SPD = 4		!  Bcache speed (WO)
	        PARAMETER BIU_CTL$S_BC_SIZE = 3
	        PARAMETER BIU_CTL$V_BC_SIZE = 28	!  Bcache size (WO)
	        PARAMETER BIU_CTL$S_WS_IO = 1
	        PARAMETER BIU_CTL$V_WS_IO = 31
	        BYTE %FILL (2)				!  Workstation IO mapping
	    END MAP
!  Cbox registers, continued
	    MAP
	        PARAMETER BC_TAG$S_HIT = 1
	        PARAMETER BC_TAG$V_HIT = 0		!  
	        PARAMETER BC_TAG$S_CTL_P = 1
	        PARAMETER BC_TAG$V_CTL_P = 1		!  tag status parity bit
	        PARAMETER BC_TAG$S_CTL_S = 1
	        PARAMETER BC_TAG$V_CTL_S = 2		!  tag shared bit
	        PARAMETER BC_TAG$S_CTL_D = 1
	        PARAMETER BC_TAG$V_CTL_D = 3		!  tag dirty bit
	        PARAMETER BC_TAG$S_CTL_V = 1
	        PARAMETER BC_TAG$V_CTL_V = 4		!  tag valid bit
	        PARAMETER BC_TAG$S_TAG = 17
	        PARAMETER BC_TAG$V_TAG = 5		!  tag
	        PARAMETER BC_TAG$S_TAG_P = 1
	        PARAMETER BC_TAG$V_TAG_P = 22		!  tag parity
	    BYTE %FILL (3)
	    END MAP
!  Cbox registers, continued
	    MAP
	        PARAMETER BIU_STAT$S_BIU_HERR = 1
	        PARAMETER BIU_STAT$V_BIU_HERR = 0	!  Hard_Error on cACK
	        PARAMETER BIU_STAT$S_BIU_SERR = 1
	        PARAMETER BIU_STAT$V_BIU_SERR = 1	!  Soft_Error on cACK
	        PARAMETER BIU_STAT$S_BC_TPERR = 1
	        PARAMETER BIU_STAT$V_BC_TPERR = 2	!  Tag Parity error in tag address RAM 
	        PARAMETER BIU_STAT$S_BC_TCPERR = 1
	        PARAMETER BIU_STAT$V_BC_TCPERR = 3	!  Tag Parity error in tag control RAM 
	        PARAMETER BIU_STAT$S_BIU_DSP_CMD = 3
	        PARAMETER BIU_STAT$V_BIU_DSP_CMD = 4	!  Cbox cycle type
	        PARAMETER BIU_STAT$S_BIU_SEO = 1
	        PARAMETER BIU_STAT$V_BIU_SEO = 7	!  second BIU or BC error
	        PARAMETER BIU_STAT$S_FILL_ECC = 1
	        PARAMETER BIU_STAT$V_FILL_ECC = 8	!  ECC error on Pcache fill data 
	        PARAMETER BIU_STAT$S_FILL_CRD = 1
	        PARAMETER BIU_STAT$V_FILL_CRD = 9	!  ECC error was correctable 
	        PARAMETER BIU_STAT$S_BIU_DPERR = 1
	        PARAMETER BIU_STAT$V_BIU_DPERR = 10	!  BIU parity error 
	        PARAMETER BIU_STAT$S_FILL_IRD = 1
	        PARAMETER BIU_STAT$V_FILL_IRD = 11	!  error during I stream fill 
	        PARAMETER BIU_STAT$S_FILL_QW = 2
	        PARAMETER BIU_STAT$V_FILL_QW = 12	!  Quadword within Pcache FILL hexaword which had a FILL error 
	        PARAMETER BIU_STAT$S_FILL_SEO = 1
	        PARAMETER BIU_STAT$V_FILL_SEO = 14	!  second FILL error 
	        PARAMETER BIU_STAT$S_RAZ = 1
	        PARAMETER BIU_STAT$V_RAZ = 15		!  Read as ZERO 
	        PARAMETER BIU_STAT$S_FILL_DSP_CMD = 4
	        PARAMETER BIU_STAT$V_FILL_DSP_CMD = 16	!  Cbox cmd which resulted in FILL error 
	        PARAMETER BIU_STAT$S_LST_WRT = 1
	        PARAMETER BIU_STAT$V_LST_WRT = 20	!  Lost write error
	        PARAMETER BIU_STAT$S_RSVD = 7
	        PARAMETER BIU_STAT$V_RSVD = 21		!  reserved bits
	        PARAMETER BIU_STAT$S_BIU_ADDR = 2
	        PARAMETER BIU_STAT$V_BIU_ADDR = 28	!  BIU ADDR bits 33:32
	        PARAMETER BIU_STAT$S_FILL_ADDR = 2
	        PARAMETER BIU_STAT$V_FILL_ADDR = 30
	        BYTE %FILL (4)				!  FILL ADDR bits 33:32
	    END MAP
	    MAP
	        PARAMETER FILL_SYN$S_LO = 7
	        PARAMETER FILL_SYN$V_LO = 0		!  ECC syndrome bits for low longword
	        PARAMETER FILL_SYN$S_HI = 7
	        PARAMETER FILL_SYN$V_HI = 7		!  ECC syndrome bits for high longword
	        PARAMETER FILL_SYN$S_FILL_1 = 18
	        PARAMETER FILL_SYN$V_FILL_1 = 14
	        BYTE %FILL (4)
	    END MAP
!  Cbox registers, continued
	    MAP
	        PARAMETER STC_RESULT$S_PASS = 1
	        PARAMETER STC_RESULT$V_PASS = 2		!  Store Conditional passed 
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER BEDECC$S_LO = 7
	        PARAMETER BEDECC$V_LO = 0		!  BEDECC bits for low longword
	        PARAMETER BEDECC$S_HI = 7
	        PARAMETER BEDECC$V_HI = 7		!  BEDECC bits for high longword
	        PARAMETER BEDECC$S_FILL_1 = 18
	        PARAMETER BEDECC$V_FILL_1 = 14
	        BYTE %FILL (4)
	    END MAP
!  Console dispatch structure
	    MAP
	        INTEGER*4 CHALT$L_BRW_CODE		!  BRW code
	        INTEGER*4 CHALT$L_SYS_TYPE		!  System Type
	        INTEGER*4 CHALT$L_CNSL_LOAD_ADR		!  Consoles Load address used by SROM
	        INTEGER*4 CHALT$L_HWRPB_SIZE		!  HWRPB size in pages
	        INTEGER*4 CHALT$L_HWRPB_PHYS_ADR	!  HWRPB base physical addrress
	        INTEGER*4 CHALT$L_MEM_BITMAP_SIZ	!  Memory bitmap size (bits)
	        INTEGER*4 CHALT$L_MEM_BITMAP_PHYS_ADR	!  Memory bitmap physical address
	        INTEGER*4 CHALT$L_MEM_BITMAP_CHKSM	!  Memory bitmap checksum
	    END MAP
!  Serial line I/O registers
	    MAP
	        PARAMETER SIO$S_SIO_IN = 1
	        PARAMETER SIO$V_SIO_IN = 0		!  Serial line/SROM input 
	        PARAMETER SIO$S_SIO_OUT = 1
	        PARAMETER SIO$V_SIO_OUT = 1		!  Serial line/SROM clock output 
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER SIO$S_SROM_OE = 1
	        PARAMETER SIO$V_SROM_OE = 0		!  SROM output enable 
	        PARAMETER SIO$S_SROM_FAST = 1
	        PARAMETER SIO$V_SROM_FAST = 1		!  Use fast version of SROM 
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER VMAR$S_LW = 1
	        PARAMETER VMAR$V_LW = 2			!  longword within quadword
	        PARAMETER VMAR$S_SUB_BLOCK = 2
	        PARAMETER VMAR$V_SUB_BLOCK = 3		!  sub-block indicator
	        PARAMETER VMAR$S_ROW_INDEX = 6
	        PARAMETER VMAR$V_ROW_INDEX = 5		!  cache row index
	        PARAMETER VMAR$S_ADDR = 21
	        PARAMETER VMAR$V_ADDR = 11
	        BYTE %FILL (4)				!  error address
	    END MAP
	    MAP
	        PARAMETER VTAG$S_V = 4
	        PARAMETER VTAG$V_V = 0			!  data valid bits
	        PARAMETER VTAG$S_DP = 4
	        PARAMETER VTAG$V_DP = 4			!  data parity bits
	        PARAMETER VTAG$S_TP = 1
	        PARAMETER VTAG$V_TP = 8			!  tag parity bit
	        PARAMETER VTAG$S_TAG = 21
	        PARAMETER VTAG$V_TAG = 11
	        BYTE %FILL (4)				!  tag
	    END MAP
	    MAP
	        PARAMETER ICSR$S_ENABLE = 1
	        PARAMETER ICSR$V_ENABLE = 0		!  VIC enable bit (RW)
	        PARAMETER ICSR$S_LOCK = 1
	        PARAMETER ICSR$V_LOCK = 2		!  Register is locked due to an error (WC)
	        PARAMETER ICSR$S_DPERR = 1
	        PARAMETER ICSR$V_DPERR = 3		!  Data parity error (RO)
	        PARAMETER ICSR$S_TPERR = 1
	        PARAMETER ICSR$V_TPERR = 4		!  Tag parity error (RO)
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER BPCR$S_HISTORY = 4
	        PARAMETER BPCR$V_HISTORY = 0		!  branch history bits
	        PARAMETER BPCR$S_MISPREDICT = 1
	        PARAMETER BPCR$V_MISPREDICT = 5		!  history of last branch
	        PARAMETER BPCR$S_FLUSH_BHT = 1
	        PARAMETER BPCR$V_FLUSH_BHT = 6		!  flush branch history table
	        PARAMETER BPCR$S_FLUSH_CTR = 1
	        PARAMETER BPCR$V_FLUSH_CTR = 7		!  flush branch hist addr counter
	        PARAMETER BPCR$S_LOAD_HISTORY = 1
	        PARAMETER BPCR$V_LOAD_HISTORY = 8	!  write new history to array
	        PARAMETER BPCR$S_BPU_ALGORITHM = 16
	        PARAMETER BPCR$V_BPU_ALGORITHM = 16
	        BYTE %FILL (3)				!  branch prediction algorithm
	    END MAP
!  The following two registers are for testability and diagnostics use only.
!  They should not be referenced in normal operation.
!  These registers are for testability and diagnostics use only.
!  In normal operation, the equivalent architecturally-defined registers
!  should be used instead.
	    MAP
	        PARAMETER PR1701_PAMODE$S_MODE = 1
	        PARAMETER PR1701_PAMODE$V_MODE = 0	!  Addressing mode(1 = 32bit addressing) (RW)
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER MMESTS$S_LV = 1
	        PARAMETER MMESTS$V_LV = 0		!  ACV fault due to length violation
	        PARAMETER MMESTS$S_PTE_REF = 1
	        PARAMETER MMESTS$V_PTE_REF = 1		!  ACV/TNV fault occurred on PPTE reference
	        PARAMETER MMESTS$S_M = 1
	        PARAMETER MMESTS$V_M = 2		!  Reference had write or modify intent
	        PARAMETER MMESTS$S_FAULT = 2
	        PARAMETER MMESTS$V_FAULT = 14		!  Fault type, one of the following:
	        PARAMETER MMESTS$S_SRC = 3
	        PARAMETER MMESTS$V_SRC = 26		!  Shadow copy of LOCK bits (see MSRC$ constants below)
	        PARAMETER MMESTS$S_LOCK = 3
	        PARAMETER MMESTS$V_LOCK = 29
	        BYTE %FILL (2)				!  Lock status (see MSRC$ constant below)
	    END MAP
	    MAP
	        PARAMETER TBSTS$S_LOCK = 1
	        PARAMETER TBSTS$V_LOCK = 0		!  Register is locked due to an error (WC)
	        PARAMETER TBSTS$S_DPERR = 1
	        PARAMETER TBSTS$V_DPERR = 1		!  Data parity error (RO)
	        PARAMETER TBSTS$S_TPERR = 1
	        PARAMETER TBSTS$V_TPERR = 2		!  Tag parity error (RO)
	        PARAMETER TBSTS$S_EM_VAL = 1
	        PARAMETER TBSTS$V_EM_VAL = 3		!  EM latch was valid when error occurred (RO)
	        PARAMETER TBSTS$S_CMD = 5
	        PARAMETER TBSTS$V_CMD = 4		!  S5 command when TB parity error occured (RO)
	        PARAMETER TBSTS$S_SRC = 3
	        PARAMETER TBSTS$V_SRC = 29
	        BYTE %FILL (2)				!  Source of original refernce (see MSRC$ constants below) (RO)
	    END MAP
	    MAP
	        PARAMETER PCSTS$S_LOCK = 1
	        PARAMETER PCSTS$V_LOCK = 0		!  Register is locked due to an error (WC)
	        PARAMETER PCSTS$S_DPERR = 1
	        PARAMETER PCSTS$V_DPERR = 1		!  Data parity error occurred (RO)
	        PARAMETER PCSTS$S_RIGHT_BANK = 1
	        PARAMETER PCSTS$V_RIGHT_BANK = 2	!  Right bank tag parity error occurred (RO)
	        PARAMETER PCSTS$S_LEFT_BANK = 1
	        PARAMETER PCSTS$V_LEFT_BANK = 3		!  Left bank tag parity error occurred (RO)
	        PARAMETER PCSTS$S_CMD = 5
	        PARAMETER PCSTS$V_CMD = 4		!  S6 command when Pcache parity error occured (RO)
	        PARAMETER PCSTS$S_PTE_ER_WR = 1
	        PARAMETER PCSTS$V_PTE_ER_WR = 9		!  Hard error on PTE DREAD occurred (orig ref was WRITE) (WC)
	        PARAMETER PCSTS$S_PTE_ER = 1
	        PARAMETER PCSTS$V_PTE_ER = 10		!  Hard error on PTE DREAD occurred (WC)
	    BYTE %FILL (2)
	    END MAP
	    MAP
	        PARAMETER PCCTL$S_D_ENABLE = 1
	        PARAMETER PCCTL$V_D_ENABLE = 0		!  Enable for invalidate, D-stream read/write/fill (RW)
	        PARAMETER PCCTL$S_I_ENABLE = 1
	        PARAMETER PCCTL$V_I_ENABLE = 1		!  Enable for invalidate, I-stream read/fill (RW)
	        PARAMETER PCCTL$S_FORCE_HIT = 1
	        PARAMETER PCCTL$V_FORCE_HIT = 2		!  Enable force hit on Pcache references (RW)
	        PARAMETER PCCTL$S_BANK_SEL = 1
	        PARAMETER PCCTL$V_BANK_SEL = 3		!  Select left bank if 0, right bank if 1 (RW)
	        PARAMETER PCCTL$S_P_ENABLE = 1
	        PARAMETER PCCTL$V_P_ENABLE = 4		!  Enable parity checking (RW)
	        PARAMETER PCCTL$S_PMM = 3
	        PARAMETER PCCTL$V_PMM = 5		!  Mbox performance monitor mode (RW)
	        PARAMETER PCCTL$S_ELEC_DISABLE = 1
	        PARAMETER PCCTL$V_ELEC_DISABLE = 8	!  Pcache electrical disable bit (RW)
	        PARAMETER PCCTL$S_RED_ENABLE = 1
	        PARAMETER PCCTL$V_RED_ENABLE = 9	!  Redundancy enable bit (RO)
	    BYTE %FILL (2)
	    END MAP
	    MAP
	        PARAMETER PR17_PCTAG$S_A = 1
	        PARAMETER PR17_PCTAG$V_A = 0		!  Allocation bit corresponding to index of this tag (RW)
	        PARAMETER PR17_PCTAG$S_V = 4
	        PARAMETER PR17_PCTAG$V_V = 1		!  Valid bits corresponding to the 4 data subblocks (RW)
	        PARAMETER PR17_PCTAG$S_P = 1
	        PARAMETER PR17_PCTAG$V_P = 5		!  Tag parity (RW)
	        PARAMETER PR17_PCTAG$S_TAG = 13
	        PARAMETER PR17_PCTAG$V_TAG = 12		!  Tag bits (RW)
	    BYTE %FILL (3)
	    END MAP
	    MAP
	        PARAMETER PCTAGA$S_INDEX = 7
	        PARAMETER PCTAGA$V_INDEX = 5		!  Index of PCache tag
	        PARAMETER PCTAGA$S_B = 1
	        PARAMETER PCTAGA$V_B = 12		!  Bank of PCache to access: 0=left, 1=right
	    BYTE %FILL (1)
	    END MAP
	    MAP
	        PARAMETER PCDAP$S_DATA_PARITY = 8
	        PARAMETER PCDAP$V_DATA_PARITY = 0	!  Even byte parity for the addressed quadword (RW)
	    BYTE %FILL (1)
	    END MAP
	END UNION
	END STRUCTURE	! PR1701DEF
CDEC$ END OPTIONS