#ifndef __BUILTINS_LOADED #define __BUILTINS_LOADED 1 /**************************************************************************** ** ** - Prototypes for platform specific builtins ** ***************************************************************************** ** Header is nonstandard ***************************************************************************** ** ** Copyright 2000 Compaq Computer Corporation ** ** Compaq and the Compaq logo Registered in U.S. Patent and Trademark Office. ** ** Confidential computer software. Valid license from Compaq required for ** possession, use or copying. Consistent with FAR 12.211 and 12.212, ** Commercial Computer Software, Computer Software Documentation, and ** Technical Data for Commercial Items are licensed to the U.S. Government ** under vendor's standard commercial license. ** ****************************************************************************** */ #pragma __nostandard #include #ifdef __cplusplus extern "C" { #endif #if __INITIAL_POINTER_SIZE # pragma __pointer_size __save # pragma __pointer_size 32 #endif /* ** This header file begins with the following three sections: ** ** OpenVMS AXP ** OpenVMS AXP with __X_FLOAT ** OpenVMS VAX DEC C Only (No DEC C++) */ /* ** Certain OpenVMS header files expect the __PAL builtins to accept ** 64-bit pointers regardless of whether the /POINTER_SIZE is used ** or not. To allow this, we will define a typedef to be used with ** those prototypes. */ #ifdef __ALPHA # ifndef ___VOID__PTR64 # define ___VOID__PTR64 1 # ifdef __INITIAL_POINTER_SIZE # if __INITIAL_POINTER_SIZE # pragma __pointer_size __save # pragma __pointer_size 64 # else # pragma __required_pointer_size __save # pragma __required_pointer_size 64 # endif typedef void * ___void__ptr64; typedef const void * __const_void__ptr64; # if __INITIAL_POINTER_SIZE # pragma __pointer_size __restore # else # pragma __required_pointer_size __restore # endif # else typedef unsigned __int64 ___void__ptr64; # endif # endif #endif #if defined(__VMS) /*********************************************************************** ** typedefs for return values of built-ins common for VAX and Alpha ** ***********************************************************************/ typedef enum {_bbcci_oldval_1, _bbcci_oldval_0} _BBCCI_STATUS; typedef enum {_bbssi_oldval_0, _bbssi_oldval_1} _BBSSI_STATUS; typedef enum {_insqi_inserted_many, _insqi_not_inserted, _insqi_inserted_only} _INSQI_STATUS; typedef enum {_insque_inserted_only, _insque_inserted_many} _INSQUE_STATUS; typedef enum {_probe_not_accessible, _probe_accessible} _PROBE_STATUS; typedef enum {_remqi_removed_more, _remqi_not_removed, _remqi_removed_empty, _remqi_empty} _REMQI_STATUS; typedef enum {_remque_removed_more, _remque_removed_empty, _remque_empty} _REMQUE_STATUS; #endif /* defined(__VMS) */ /************************************************************************/ #if defined(__ALPHA) && defined(__VMS) /************************************************************************/ /* ** The following builtins were added in DEC C V5.2 */ #if (__DECC_VER >= 50200000) || (__DECCXX_VER >= 50200000) /************************************************************ ** DEC C builtins for atomic/interlocked operations ************************************************************* ** ** These functions are not easily/efficiently implemented using inline ** assembly code, and so the compiler has builtin knowledge of their names ** and signatures in order to generate fast and reliable code (e.g. it may ** generate loops with tests arranged for branch prediction using ** out-of-line branch targets for failure paths). ** ** The _RETRY variants store a non-zero status if the operation completes ** successfully within the specified number of retries. The variants ** without _RETRY do not return until they succeed. ** ** The following operations do not in themselves generate Memory Barriers. ** The user is expected to code explicitly any Memory Barriers where ** needed using inline assembly code, e.g. asm("mb"), or asm("wmb"). ** ** Many of these builtins perform essentially the same operations as other ** builtins having similar names but with the ATOMIC or INTERLOCKED ** appearing in a different position. The following group with the ATOMIC ** or INTERLOCKED first offer several usability improvements over the ** older versions with the ATOMIC or INTERLOCKED appearing later in the ** name. The older versions are retained for compatibility only. ** ** Usability problems with the older builtins that are addressed by this ** newer set introduced in DEC C V5.2: ** ** Old versions did not provide the pre-updated value, and ** provided status even with infinite retry, in which case the builtin ** does not return until it succeeds. New versions provide the ** old value, and only provide status when the limited-retry variant is ** used. ** ** Older versions generated memory barriers both before and after the ** update. Newer versions allow the user to control memory barrier ** placement for the low-level primitives. ** ** Older versions did not provide for efficient spinlock or counted ** semaphore implementation. There are new higher-level spinlock and ** counted semaphore operations that include a test of the stored value ** to control success, and generate memory barriers just after a lock ** or resource is acquired, and just before it is release. */ /* ** The following set of functions may pass long pointers. */ # if __INITIAL_POINTER_SIZE # pragma __pointer_size 64 # endif /* ** Atomic update of location with integer operation, returning previous ** contents. */ int __ATOMIC_ADD_LONG (volatile void *__addr, int __expr); int __ATOMIC_ADD_LONG_RETRY (volatile void *__addr, int __expr, int __retry, int *__sts); __int64 __ATOMIC_ADD_QUAD (volatile void *__addr, __int64 __expr); __int64 __ATOMIC_ADD_QUAD_RETRY (volatile void *__addr, __int64 __expr, int __retry, int *__sts); int __ATOMIC_AND_LONG (volatile void *__addr, int __expr); int __ATOMIC_AND_LONG_RETRY (volatile void *__addr, int __expr, int __retry, int *__sts); __int64 __ATOMIC_AND_QUAD (volatile void *__addr, __int64 __expr); __int64 __ATOMIC_AND_QUAD_RETRY (volatile void *__addr, __int64 __expr, int __retry, int *__sts); int __ATOMIC_OR_LONG (volatile void *__addr, int __expr); int __ATOMIC_OR_LONG_RETRY (volatile void *__addr, int __expr, int __retry, int *__sts); __int64 __ATOMIC_OR_QUAD (volatile void *__addr, __int64 __expr); __int64 __ATOMIC_OR_QUAD_RETRY (volatile void *__addr, __int64 __expr, int __retry, int *__sts); /* ** Just like __ATOMIC_ADD, but using +1 or -1 implicitly. */ int __ATOMIC_INCREMENT_LONG (volatile void *__addr); int __ATOMIC_INCREMENT_LONG_RETRY (volatile void *__addr, int __retry, int *__sts); __int64 __ATOMIC_INCREMENT_QUAD (volatile void *__addr); __int64 __ATOMIC_INCREMENT_QUAD_RETRY (volatile void *__addr, int __retry, int *__sts); int __ATOMIC_DECREMENT_LONG (volatile void *__addr); int __ATOMIC_DECREMENT_LONG_RETRY (volatile void *__addr, int __retry, int *__sts); __int64 __ATOMIC_DECREMENT_QUAD (volatile void *__addr); __int64 __ATOMIC_DECREMENT_QUAD_RETRY (volatile void *__addr, int __retry, int *__sts); /* ** Atomic replacement of location's contents, returning previous contents. */ int __ATOMIC_EXCH_LONG (volatile void *__addr, int __expr); int __ATOMIC_EXCH_LONG_RETRY (volatile void *__addr, int __expr, int __retry, int *__sts); __int64 __ATOMIC_EXCH_QUAD (volatile void *__addr, __int64 __expr); __int64 __ATOMIC_EXCH_QUAD_RETRY (volatile void *__addr, __int64 __expr, int __retry, int *__sts); /* ** Interlocked "test for bit clear and then clear". Returns non-zero if ** bit was already clear. */ int __INTERLOCKED_TESTBITCC_QUAD (volatile void *__addr, int __bitpos); int __INTERLOCKED_TESTBITCC_QUAD_RETRY (volatile void *__addr, int __bitpos, int __retry, int *__sts); /* ** Interlocked "test for bit set and then set". Returns non-zero if bit ** was already set. */ int __INTERLOCKED_TESTBITSS_QUAD (volatile void *__addr, int __bitpos); int __INTERLOCKED_TESTBITSS_QUAD_RETRY (volatile void *__addr, int __bitpos, int __retry, int *__sts); /* ** Acquire/release binary spinlock based on low-order bit of a longword. ** NOTE: Memory barrier generated after lock, before unlock. _RETRY ** variant returns non-zero on success within retry attempts. */ void __LOCK_LONG (volatile void *__addr); int __LOCK_LONG_RETRY (volatile void *__addr, int __retry); void __UNLOCK_LONG (volatile void *__addr); /* ** Acquire/release counted semaphore based on positive value of longword ** indicating number of resources available. ** ** NOTE: Memory barrier generated after acquisition, before release. ** _RETRY variant returns non-zero on success within retry attempts. */ void __ACQUIRE_SEM_LONG (volatile void *__addr); int __ACQUIRE_SEM_LONG_RETRY (volatile void *__addr, int __retry); void __RELEASE_SEM_LONG (volatile void *__addr); /* ** Done with the set of functions which may pass long pointers. */ # if __INITIAL_POINTER_SIZE # pragma __pointer_size 32 # endif #endif /* (__DECC_VER >= 50200000) || (__DECCXX_VER >= 50200000) */ /* ** xxxQUE Mapping Tables ** These tables map the _PAL returned values into VAX C expected values. */ #define __xxxQUE_MAP_ALPHA_TO_VAX(z) ((0x12 >> (z)) & 3) #define __REMQxI_MAP_ALPHA_TO_VAX(z) (((0x0c >> (z)) + 1) & 3) /* ** All longword queue operations take 32-bit pointers. */ #ifdef __INITIAL_POINTER_SIZE # pragma __required_pointer_size __save # pragma __required_pointer_size 32 #endif /* ** Insertion into longword queues */ int __PAL_INSQHIL (void *__head, void *__new); /* At head, interlocked */ int __PAL_INSQTIL (void *__head, void *__new); /* At tail, interlocked */ int __PAL_INSQUEL (void *__pred, void *__new); /* At pred, interlocked */ int __PAL_INSQUEL_D (void **__pred, void *__new); /* At pred, indirectly */ int __PAL_INSQHILR (void *__head, void *__new); /* At head, interlocked */ int __PAL_INSQTILR (void *__head, void *__new); /* At tail, interlocked */ /* ** Removal from from longword queues */ int __PAL_REMQHIL (void *__head, void **__rem); /* At head, interlocked */ int __PAL_REMQTIL (void *__head, void **__rem); /* At tail, interlocked */ int __PAL_REMQUEL (void *__entr, void **__rem); /* At entr, interlocked */ int __PAL_REMQUEL_D (void **__entr, void **__rem); /* At entr, indirectly */ int __PAL_REMQHILR (void *__head, void **__rem); /* At head, interlocked */ int __PAL_REMQTILR (void *__head, void **__rem); /* At tail, interlocked */ /* ** All quadword queue operations take 64-bit pointers. */ #ifdef __INITIAL_POINTER_SIZE # pragma __required_pointer_size 64 #endif /* ** Insertion into quadword queues */ int __PAL_INSQHIQ (void *__head, void *__new); /* At head, interlocked */ int __PAL_INSQTIQ (void *__head, void *__new); /* At tail, interlocked */ int __PAL_INSQUEQ (void *__pred, void *__new); /* At pred, interlocked */ int __PAL_INSQUEQ_D (void **__pred, void *__new); /* At pred, indirectly */ int __PAL_INSQHIQR (void *__head, void *__new); /* At head, interlocked */ int __PAL_INSQTIQR (void *__head, void *__new); /* At tail, interlocked */ /* ** Removal from quadword queues */ int __PAL_REMQHIQ (void *__head, void **__rem); /* At head, interlocked */ int __PAL_REMQTIQ (void *__head, void **__rem); /* At tail, interlocked */ int __PAL_REMQUEQ (void *__entr, void **__rem); /* At entr, interlocked */ int __PAL_REMQUEQ_D (void **__entr, void **__rem); /* At entr, indirectly */ int __PAL_REMQHIQR (void *__head, void **__rem); /* At head, interlocked */ int __PAL_REMQTIQR (void *__head, void **__rem); /* At tail, interlocked */ /* ** Restore the original required_pointer_size */ #ifdef __INITIAL_POINTER_SIZE # pragma __required_pointer_size __restore #endif /* ** The following set of functions may pass long pointers. */ #if __INITIAL_POINTER_SIZE #pragma __pointer_size 64 #endif /* ** Move from Processor Register */ unsigned int __PAL_MFPR_ASTEN (void); /* AST Enable */ unsigned int __PAL_MFPR_ASTSR (void); /* AST Summary Register */ void * __PAL_MFPR_ESP (void); /* Executive Stack Pointer */ int __PAL_MFPR_FEN (void); /* Floating Point Enable */ int __PAL_MFPR_IPL (void); /* Interrupt Priority Level */ __int64 __PAL_MFPR_MCES (void); /* Machine Check Error Summary */ void * __PAL_MFPR_PCBB (void); /* Priv Context Block Base */ __int64 __PAL_MFPR_PRBR (void); /* Processor Base Register */ int __PAL_MFPR_PTBR (void); /* Page Table Base Register */ void * __PAL_MFPR_SCBB (void); /* System Control Block Base */ unsigned int __PAL_MFPR_SISR (void); /* Software Int Summ Register */ void * __PAL_MFPR_SSP (void); /* Supervisor Stack Pointer */ __int64 __PAL_MFPR_TBCHK (void *__addr); /* Translation Buffer Check */ void * __PAL_MFPR_USP (void); /* User Stack Pointer */ void * __PAL_MFPR_VPTB (void); /* Virtual Page Table */ __int64 __PAL_MFPR_WHAMI (void); /* Who Am I */ /* ** Move to Processor Register */ void __PAL_MTPR_ASTEN (unsigned int __mask); /* AST Enable */ void __PAL_MTPR_ASTSR (unsigned int __mask); /* AST Summary Register */ void __PAL_MTPR_DATFX (int __value); /* Data Alignment Trap Fixup */ void __PAL_MTPR_ESP (void *__addr); /* Executive Stack Pointer */ void __PAL_MTPR_FEN (int __value); /* Floating Point Enable */ void __PAL_MTPR_IPIR (__int64 __number); /* Interprocessor Inter Req */ int __PAL_MTPR_IPL (int __value); /* Interrupt Priority Level */ void __PAL_MTPR_MCES (__int64 __value); /* Machine Check Error Summary */ void __PAL_MTPR_PRBR (__int64 __value); /* Processor Base Register */ void __PAL_MTPR_SCBB (void *__addr); /* System Control Block Base */ void __PAL_MTPR_SIRR (int __level); /* Software Inter Req Register */ void __PAL_MTPR_SSP (int *__addr); /* Supervisor Stack Pointer */ void __PAL_MTPR_TBIA (void); /* User Stack Pointer */ void __PAL_MTPR_TBIAP (void); /* T Buffer Inval All Process */ void __PAL_MTPR_TBIS (___void__ptr64 __addr); /* T Buffer Inval Single */ void __PAL_MTPR_TBISD (___void__ptr64 __addr); /* T Buffer Inval Single Data */ void __PAL_MTPR_TBISI (___void__ptr64 __addr); /* T Buffer Inval Single Instr */ void __PAL_MTPR_USP (void *__addr); /* User Stack Pointer */ void __PAL_MTPR_VPTB (void *__addr); /* Virtual Page Table */ /* ** Probe Read/Write Acessibility */ int __PAL_PROBER(const void *__base_address, int __offset, char __mode); int __PAL_PROBEW(const void *__base_address, int __offset, char __mode); /* ** Change Mode */ void __PAL_CHME(void); /* Executive */ void __PAL_CHMK(void); /* Kernel */ void __PAL_CHMS(void); /* Supervisor */ void __PAL_CHMU(void); /* User */ /* ** Load/Store Quadword Physical */ unsigned __int64 __PAL_LDQP(void *__addr); /* Load */ void __PAL_STQP(void *__addr, unsigned __int64 __value); /* Store */ /* ** Done with the set of functions which may pass long pointers. */ #if __INITIAL_POINTER_SIZE #pragma __pointer_size 32 #endif /* ** Cache Flush */ void __PAL_CFLUSH(int __value); /* ** Drain Aborts */ void __PAL_DRAINA(void); /* ** Read Processor Status */ unsigned __int64 __PAL_RD_PS(void); /* ** Swap AST Enable */ unsigned int __PAL_SWASTEN(int __new_state_mask); /* ** Write Processor Status Software Field */ void __PAL_WR_PS_SW(int __mask); /* ** Convert from G-Floating to Quadword */ __int64 __CVTGQ(double __operand1); /* ** Convert from G-Floating to F-Floating Chopped */ float __CVTGF_C(double __operand1); /* ** Add Floating Point Chopped */ float __ADDF_C(float __operand1, float __operand2); double __ADDG_C(double __operand1, double __operand2); /* ** Subtract Floating Point Chopped */ float __SUBF_C(float __operand1, float __operand2); double __SUBG_C(double __operand1, double __operand2); /* ** Multiply Floating Point Chopped */ float __MULF_C(float __operand1, float __operand2); double __MULG_C(double __operand1, double __operand2); /* ** Divide Floating Point Chopped */ float __DIVF_C(float __operand1, float __operand2); double __DIVG_C(double __operand1, double __operand2); /* ** Macros for translation from VAX C to DEC C ALPHA builtins */ #define _BBCCI(position, address) __TESTBITCCI((address), (position)) #define _BBSSI(position, address) __TESTBITSSI((address), (position)) #define _INSQHI(new_entry, head) \ ((0x12 >> (__PAL_INSQHIL((head), (new_entry))+2)) & 3) #define _INSQTI(new_entry, head) \ ((0x12 >> (__PAL_INSQTIL((head), (new_entry))+2)) & 3) #define _INSQUE(new_entry, predecessor) \ ((0x12 >> (__PAL_INSQUEL((predecessor), (new_entry))+1)) & 3) #define _REMQHI(head, removed_entry) \ (((0x0c >> (__PAL_REMQHIL((head), (void **)(removed_entry))+1))+1) & 3) #define _REMQTI(head, removed_entry) \ (((0x0c >> (__PAL_REMQTIL((head), (void **)(removed_entry))+1))+1) & 3) #define _REMQUE(entry, removed_entry) \ ((0x12 >> (__PAL_REMQUEL((entry), (void **)(removed_entry))+1)) & 3) #define _PROBER(mode, offset, address) __PAL_PROBER((address), (offset), (mode)) #define _PROBEW(mode, offset, address) __PAL_PROBEW((address), (offset), (mode)) /* ** __ALLOCA builtin - allocate n-bytes from the stack */ void * __ALLOCA(unsigned int __x); /* ** The remaining functions can handle accepting long pointers. */ #if __INITIAL_POINTER_SIZE #pragma __pointer_size 64 #endif /* ** UMULH Builtin - Unsigned Quadword Multiply High */ unsigned __int64 __UMULH(unsigned __int64 __oper1, unsigned __int64 __oper2); /* ** op_ATOMIC_size Builtins ** ** Note: There is one optional retry count parameter */ int __ADD_ATOMIC_LONG(void *__addr, int __expr, ...); int __ADD_ATOMIC_QUAD(void *__addr, int __expr, ...); int __AND_ATOMIC_LONG(void *__addr, int __expr, ...); int __AND_ATOMIC_QUAD(void *__addr, int __expr, ...); int __OR_ATOMIC_LONG(void *__addr, int __expr, ...); int __OR_ATOMIC_QUAD(void *__addr, int __expr, ...); /* ** TESTBITxxI ** ** Note: There is one optional retry count parameter */ int __TESTBITCCI(void *__addr, int __position, ...); int __TESTBITSSI(void *__addr, int __position, ...); /* ** Add Aligned Word Interlocked */ int __ADAWI(short __src, volatile short *__dest); /* ** Trap Barrier Instruction */ void __TRAPB(void); /* ** Read Cycle Counter */ unsigned __int64 __RPCC(void); /* ** Halt the Processor. (Privileged) */ void _HALT(void); void __PAL_HALT(void); /* ** Generate Trap */ void __PAL_GENTRAP(unsigned __int64 __encoded_software_trap); /* ** Breakpoint */ void __PAL_BPT(void); /* ** Bugcheck */ void __PAL_BUGCHK(void); /* ** Swap Privileged Context */ void __PAL_SWPCTX(void *__addr); /* ** Copy Sign */ float __CPYSF (float __operand1, float __operand2); double __CPYS (double __operand1, double __operand2); /* ** Copy Sign Negate */ float __CPYSNF(float __operand1, float __operand2); double __CPYSN (double __operand1, double __operand2); /* ** Copy Sign Exponent */ float __CPYSEF(float __operand1, float __operand2); double __CPYSE (double __operand1, double __operand2); /* ** Convert from T-Floating to Quadword */ __int64 __CVTTQ(double __operand1); /* ** Convert from T-Floating to S-Floating Chopped */ float __CVTTS_C(double __operand1); /* ** Add Floating Point Chopped */ float __ADDS_C(float __operand1, float __operand2); double __ADDT_C(double __operand1, double __operand2); /* ** Subtract Floating Point Chopped */ float __SUBS_C(float __operand1, float __operand2); double __SUBT_C(double __operand1, double __operand2); /* ** Multiply Floating Point Chopped */ float __MULS_C(float __operand1, float __operand2); double __MULT_C(double __operand1, double __operand2); /* ** Divide Floating Point Chopped */ float __DIVS_C(float __operand1, float __operand2); double __DIVT_C(double __operand1, double __operand2); /* ** Memory Barrier */ void __MB(void); /* ** Instruction Memory Barrier */ void __PAL_IMB(void); /* ** Compare, Store Long/Quad */ int __CMP_STORE_LONG (volatile void *__src, int __oldval, int __newval, volatile void *__dst); int __CMP_STORE_QUAD (volatile void *__src, __int64 __oldval, __int64 __newval, volatile void *__dst); /* ** The following intrinsics were added in DEC C V5.7 and DIGITAL C++ V6.0 */ #if (__DECC_VER >= 50700000) || (__DECCXX_VER >= 60000000) __int64 _popcnt (unsigned __int64); __int64 _poppar (unsigned __int64); __int64 _leadz (unsigned __int64); __int64 _trailz (unsigned __int64); # pragma intrinsic (_popcnt, _poppar, _leadz, _trailz) #endif /* (__DECC_VER >= 50700000) || (__DECCXX_VER >= 60000000) */ /* ** Reset the pointer size prior to leaving this section */ #if __INITIAL_POINTER_SIZE #pragma __pointer_size 32 #endif #endif /* __ALPHA && __VMS */ /************************************************************************/ #if defined(__ALPHA) && defined(__VMS) && defined(__X_FLOAT) /************************************************************************/ /* ** Convert from X-Floating to Quadword */ __int64 __CVTXQ(long double __operand1); /* ** Convert from X-Floating to T-Floating Chopped */ double __CVTXT_C(long double __operand1); /* ** Add Floating Point Chopped */ long double __ADDX_C(long double __operand1, long double __operand2); /* ** Subtract Floating Point Chopped */ long double __SUBX_C(long double __operand1, long double __operand2); /* ** Multiply Floating Point Chopped */ long double __MULX_C(long double __operand1, long double __operand2); /* ** Divide Floating Point Chopped */ long double __DIVX_C(long double __operand1, long double __operand2); #endif /* __ALPHA && __VMS && __X_FLOAT */ /************************************************************************/ #if defined(__VAX) && defined(__VMS) && defined(__DECC) /************************************************************************/ /* ** The following builtin was added in DEC C V6.0 */ #if (__DECC_VER >= 60000000) void * __ALLOCA(unsigned int __x); #endif /* ** The following builtins were added in DEC C V5.2 */ #if (__DECC_VER >= 50200000) /* ** Processor Register Management */ typedef enum {_value_replaced, _value_not_replaced} _MTPR_STATUS; void _MFPR(int __register_num, void *__destination); _MTPR_STATUS _MTPR(int __new_value, int __register_num); /* ** Processor control */ void _HALT(void); /* ** General Register query */ typedef enum {_R0, _R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _AP, _FP, _SP, _PC} _REGISTER_NUMBER; int _READ_GPR(_REGISTER_NUMBER __general_register_number); #endif /* __DECC_VER >= 50200000 */ /* ** Add Aligned Word Interlocked */ typedef enum {_adawi_sum_neg=-1,_adawi_sum_zero,_adawi_sum_pos} _ADAWI_STATUS; _ADAWI_STATUS _ADAWI(short __src, short *__dest); /* ** Interlocked branch group */ _BBCCI_STATUS _BBCCI(int __position, void *__addr); _BBSSI_STATUS _BBSSI(int __position, void *__addr); /* ** Find First bit group */ typedef enum {_ff_bit_not_found, _ff_bit_found} _FF_STATUS; _FF_STATUS _FFC(int __start, char __size, const void *__base, int *__position); _FF_STATUS _FFS(int __start, char __size, const void *__base, int *__position); /* ** Insert into a queue group */ _INSQI_STATUS _INSQHI(void *__new_entry, void *__head); _INSQI_STATUS _INSQTI(void *__new_entry, void *__head); _INSQUE_STATUS _INSQUE(void *__new_entry, void *__predecessor); /* ** Character processing group */ unsigned short _LOCC(char __target, unsigned short __length, const char *__string, ...); void _MOVC3(unsigned short __length, const char *__src, char *__dest, ...); void _MOVC5(unsigned short __srclen, const char *__src, char __fill, unsigned short __destlen, char *__dest, ...); unsigned short _SCANC(unsigned short __length, const char *__string, const char *__table, char __mask, ...); unsigned short _SKPC(char __target, unsigned short __length, const char *__string, ...); unsigned short _SPANC(unsigned short __length, const char *__string, const char *__table, char __mask, ...); /* ** Obtain the program status longword */ void _MOVPSL(void *__psl); /* ** Probe memory group */ _PROBE_STATUS _PROBER(char __mode, unsigned short __length, const void *__addr); _PROBE_STATUS _PROBEW(char __mode, unsigned short __length, const void *__addr); /* ** Remove from a queue group */ _REMQI_STATUS _REMQHI(void *__head, void *__removed_entry); _REMQI_STATUS _REMQTI(void *__head, void *__removed_entry); _REMQUE_STATUS _REMQUE(void *__entry, void *__removed_entry); #endif /* __VAX && __VMS */ /* ** Restore the users pointer context */ #if __INITIAL_POINTER_SIZE # pragma __pointer_size __restore #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __BUILTINS_LOADED */