%IF %DECLARED ( %BASIC$QUADWORD_DECLARED ) = 0 %THEN RECORD BASIC$QUADWORD LONG FILL ( 2 ) END RECORD %LET %BASIC$QUADWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$OCTAWORD_DECLARED ) = 0 %THEN RECORD BASIC$OCTAWORD LONG FILL ( 4 ) END RECORD %LET %BASIC$OCTAWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$F_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$F_FLOATING_COMPLEX SINGLE REAL_PART SINGLE IMAGINARY_PART END RECORD %LET %BASIC$F_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$D_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$D_FLOATING_COMPLEX DOUBLE REAL_PART DOUBLE IMAGINARY_PART END RECORD %LET %BASIC$D_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$G_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$G_FLOATING_COMPLEX GFLOAT REAL_PART GFLOAT IMAGINARY_PART END RECORD %LET %BASIC$G_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$H_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$H_FLOATING_COMPLEX HFLOAT REAL_PART HFLOAT IMAGINARY_PART END RECORD %LET %BASIC$H_FLOATING_COMPLEX_DECL = 1 %END %IF ! + ! PROCESSOR REGISTER DEFINITIONS ! - DECLARE LONG CONSTANT PR$_KSP = 0 ! KERNEL STACK POINTER DECLARE LONG CONSTANT PR$_ESP = 1 ! EXECUTIVE STACK POINTER DECLARE LONG CONSTANT PR$_SSP = 2 ! SUPERVISOR STACK POINTER DECLARE LONG CONSTANT PR$_USP = 3 ! USER STACK POINTER DECLARE LONG CONSTANT PR$_ISP = 4 ! INTERRUPT STACK POINTER DECLARE LONG CONSTANT PR$_ASN = 6 ! ADDRESS SPACE NUMBER REGISTER DECLARE LONG CONSTANT PR$_SPTEP = 7 ! SYSTEM PTE PROTOTYPE REGISTER DECLARE LONG CONSTANT PR$_P0BR = 8 ! P0 BASE REGISTER DECLARE LONG CONSTANT PR$_P0LR = 9 ! P0 LIMIT REGISTER DECLARE LONG CONSTANT PR$_P1BR = 10 ! P1 BASE REGISTER DECLARE LONG CONSTANT PR$_P1LR = 11 ! P1 LIMIT REGISTER DECLARE LONG CONSTANT PR$_SBR = 12 ! SYSTEM BASE REGISTER DECLARE LONG CONSTANT PR$_SLR = 13 ! SYSTEM LIMIT REGISTER DECLARE LONG CONSTANT PR$_CPUID = 14 ! CPU IDENTIFIER REGISTER DECLARE LONG CONSTANT PR$_WHAMI = 15 ! WHo AM I REGISTER DECLARE LONG CONSTANT PR$_PCBB = 16 ! PROCESS CONTROL BLOCK BASE DECLARE LONG CONSTANT PR$_SCBB = 17 ! SYSTEM CONTROL BLOCK BASE DECLARE LONG CONSTANT PR$_IPL = 18 ! INTERRUPT PRIORITY LEVEL REGISTER DECLARE LONG CONSTANT PR$_ASTLVL = 19 ! AST LEVEL REGISTER DECLARE LONG CONSTANT PR$_SIRR = 20 ! SOFTWARE INTERRUPT REQUEST REGISTER DECLARE LONG CONSTANT PR$_SISR = 21 ! SOFTWARE INTERRUPT SUMMARY REGISTER DECLARE LONG CONSTANT PR$_ICCS = 24 ! INTERVAL CLOCK CONTROL STATUS REGISTER DECLARE LONG CONSTANT PR$_RXCS = 32 ! CONSOLE RECIEVER CONTROL STATUS REGISTER DECLARE LONG CONSTANT PR$_RXDB = 33 ! CONSOLE RECEIVER DATA BUFFER REGISTER DECLARE LONG CONSTANT PR$_TXCS = 34 ! CONSOLE TRANSMIT CONTROL STATUS REGISTER DECLARE LONG CONSTANT PR$_TXDB = 35 ! CONSOLE TRANSMIT DATA BUFFER REGISTER DECLARE LONG CONSTANT PR$_MAPEN = 56 ! MAPPING ENABLE REGISTER DECLARE LONG CONSTANT PR$_TBIA = 57 ! TRANSLATION BUFFER INVALIDATE: ALL DECLARE LONG CONSTANT PR$_TBIS = 58 ! TB INVALIDATE: SINGLE DECLARE LONG CONSTANT PR$_TBIASN = 59 ! TB INVALIDATE: ADDRESS SPACE NUMBER DECLARE LONG CONSTANT PR$_TBISYS = 60 ! TB INVALIDATE: SYSTEM DECLARE LONG CONSTANT PR$_SID = 62 ! SYSTEM IDENTIFICATION REGISTER DECLARE LONG CONSTANT PR$_TBCHK = 63 ! TRANSLATION BUFFER VALID CHECK DECLARE LONG CONSTANT PR$_VPSR = 144 ! VECTOR PROCESSOR STATUS REGISTER DECLARE LONG CONSTANT PR$_VAER = 145 ! VECTOR ARITHMETIC EXCEPTION REGISTER DECLARE LONG CONSTANT PR$_VMAC = 146 ! VECTOR MEMORY ACCESS CHECK REGISTER DECLARE LONG CONSTANT PR$_VTBIA = 147 ! VECTOR TB INVALIDATE ALL DECLARE LONG CONSTANT PR$_VSAR = 148 ! VECTOR STATE ADDRESS REGISTER DECLARE LONG CONSTANT PR$_SID_TYP780 = 1 ! VAX 11/780 DECLARE LONG CONSTANT PR$_SID_TYP750 = 2 ! VAX 11/750 DECLARE LONG CONSTANT PR$_SID_TYP730 = 3 ! VAX 11/730 DECLARE LONG CONSTANT PR$_SID_TYP790 = 4 ! VAX 11/790 DECLARE LONG CONSTANT PR$_SID_TYP8SS = 5 ! Scorpio for now DECLARE LONG CONSTANT PR$_SID_TYP8NN = 6 ! Nautilus for now DECLARE LONG CONSTANT PR$_SID_TYPUV1 = 7 ! MicroVAX I DECLARE LONG CONSTANT PR$_SID_TYPUV2 = 8 ! MicroVAX II DECLARE LONG CONSTANT PR$_SID_TYP410 = 8 ! VAXstar DECLARE LONG CONSTANT PR$_SID_TYP009 = 9 ! Virtual VAX DECLARE LONG CONSTANT PR$_SID_TYP420 = 10 ! PVAX DECLARE LONG CONSTANT PR$_SID_TYP520 = 10 ! Cirrus I DECLARE LONG CONSTANT PR$_SID_TYP650 = 10 ! Mayfair DECLARE LONG CONSTANT PR$_SID_TYP9CC = 10 ! Calypso/XCP DECLARE LONG CONSTANT PR$_SID_TYP9CI = 10 DECLARE LONG CONSTANT PR$_SID_TYP60 = 10 ! Firefox DECLARE LONG CONSTANT PR$_SID_TYP670 = 11 ! KA670 ( Pele ) DECLARE LONG CONSTANT PR$_SID_TYP9RR = 11 ! XRP DECLARE LONG CONSTANT PR$_SID_TYP43 = 11 ! KA43 ( RigelMAX ) DECLARE LONG CONSTANT PR$_SID_TYP9AQ = 14 ! Aquarius DECLARE LONG CONSTANT PR$_SID_TYP8PS = 17 ! Polarstar DECLARE LONG CONSTANT PR$_SID_TYP1202 = 18 ! Mariah/XMP DECLARE LONG CONSTANT PR$_SID_TYP46 = 18 ! PV-Mariah DECLARE LONG CONSTANT PR$_SID_TYP600 = 19 DECLARE LONG CONSTANT PR$_SID_TYP690 = 19 DECLARE LONG CONSTANT PR$_SID_TYP700 = 19 DECLARE LONG CONSTANT PR$_SID_TYP1302 = 19 DECLARE LONG CONSTANT PR$_SID_TYP49 = 19 DECLARE LONG CONSTANT PR$_SID_TYP1303 = 19 DECLARE LONG CONSTANT PR$_SID_TYP660 = 20 ! KA660 ( Spitfire ) DECLARE LONG CONSTANT PR$_SID_TYP440 = 20 ! PVAX2 DECLARE LONG CONSTANT PR$_SID_TYP4A = 20 ! PCVAX DECLARE LONG CONSTANT PR$_SID_TYP550 = 20 ! Cirrus II DECLARE LONG CONSTANT PR$_SID_TYP1701 = 23 ! Laser/Neon DECLARE LONG CONSTANT PR$_SID_TYP560 = 23 ! KA560 ( Jetstream ) DECLARE LONG CONSTANT PR$_SID_TYPMAX = 23 ! MAX LEGAL CPU TYPE DECLARE LONG CONSTANT PR$_SID_TYP_NOTAVAX = 128 ! Not a VAX ( i.e. Alpha or some such ) ! Chip CPU types DECLARE LONG CONSTANT PR$_SID_TYPUV = 8 ! MicroVAX chip ! MicroVAX chip CPU Subtypes DECLARE LONG CONSTANT PR$_XSID_UV_UV = 0 ! Generic MicroVAX ( unused subtype ) DECLARE LONG CONSTANT PR$_XSID_UV_UV2 = 1 ! MicroVAX II DECLARE LONG CONSTANT PR$_XSID_UV_410 = 4 ! VAXstar DECLARE LONG CONSTANT PR$_SID_TYPCV = 10 ! CVAX chip ! CVAX chip CPU Subtypes DECLARE LONG CONSTANT PR$_XSID_CV_CV = 0 ! Generic CVAX ( unused subtype ) DECLARE LONG CONSTANT PR$_XSID_CV_650 = 1 ! Mayfair DECLARE LONG CONSTANT PR$_XSID_CV_9CC = 2 ! Calypso/XCP DECLARE LONG CONSTANT PR$_XSID_CV_60 = 3 ! Firefox DECLARE LONG CONSTANT PR$_XSID_CV_420 = 4 ! PVAX DECLARE LONG CONSTANT PR$_XSID_CV_9CI = 5 DECLARE LONG CONSTANT PR$_XSID_CV_520 = 7 ! CIRRUS I DECLARE LONG CONSTANT PR$_SID_TYPRV = 11 ! Rigel chip ! Rigel chip CPU Subtypes DECLARE LONG CONSTANT PR$_XSID_RV_RV = 0 ! Generic Rigel ( unused subtype ) DECLARE LONG CONSTANT PR$_XSID_RV_670 = 1 ! KA670 ( Pele ) DECLARE LONG CONSTANT PR$_XSID_RV_9RR = 2 ! Calypso/XRP DECLARE LONG CONSTANT PR$_XSID_RV_43 = 4 ! KA43 ( RigelMAX ) DECLARE LONG CONSTANT PR$_SID_TYPV12 = 18 ! Mariah chip set ! Mariah chip CPU Subtypes DECLARE LONG CONSTANT PR$_XSID_V12_V12 = 0 ! Generic Mariah ( unused subtype ) DECLARE LONG CONSTANT PR$_XSID_V12_1202 = 2 ! MARIAH/XMP DECLARE LONG CONSTANT PR$_XSID_V12_46 = 4 ! PVAX- mariah subtype DECLARE LONG CONSTANT PR$_SID_TYPV13 = 19 DECLARE LONG CONSTANT PR$_XSID_V13_V13 = 0 DECLARE LONG CONSTANT PR$_XSID_V13_690 = 1 DECLARE LONG CONSTANT PR$_XSID_V13_1302 = 2 DECLARE LONG CONSTANT PR$_XSID_V13_1303 = 3 DECLARE LONG CONSTANT PR$_XSID_V13_49 = 4 DECLARE LONG CONSTANT PR$_XSID_V13_700 = 5 DECLARE LONG CONSTANT PR$_XSID_V13_600 = 6 DECLARE LONG CONSTANT PR$_SID_TYPV14 = 20 ! SOC Chip SID ! SOC chip CPU subtypes DECLARE LONG CONSTANT PR$_XSID_V14_V14 = 0 ! unused subtype DECLARE LONG CONSTANT PR$_XSID_V14_660 = 1 ! KA660 ( Spitfire ) DECLARE LONG CONSTANT PR$_XSID_V14_440 = 4 ! PVAX2 subtype DECLARE LONG CONSTANT PR$_XSID_V14_4A = 5 ! PCVAX subtype DECLARE LONG CONSTANT PR$_XSID_V14_550 = 7 ! CIRRUS II DECLARE LONG CONSTANT PR$_SID_TYPV17 = 23 ! NVAX+ Chip SID ! NVAX+ chip CPU subtypes DECLARE LONG CONSTANT PR$_XSID_V17_V17 = 0 ! unused subtype DECLARE LONG CONSTANT PR$_XSID_V17_1701 = 1 ! Laser/Neon DECLARE LONG CONSTANT PR$_XSID_V17_560 = 2 ! KA560 ( Jetstream ) ! Nautilus CPU Subtypes DECLARE LONG CONSTANT PR$_XSID_N8800 = 0 ! VAX 8800 DECLARE LONG CONSTANT PR$_XSID_N8700 = 1 ! VAX 8700 DECLARE LONG CONSTANT PR$_XSID_N2 = 2 ! Undefined Nautilus CPU DECLARE LONG CONSTANT PR$_XSID_N3 = 3 ! Undefined Nautilus CPU DECLARE LONG CONSTANT PR$_XSID_N4 = 4 ! Undefined Nautilus CPU DECLARE LONG CONSTANT PR$_XSID_N5 = 5 ! Undefined Nautilus CPU DECLARE LONG CONSTANT PR$_XSID_N8550 = 6 ! VAX 8550 DECLARE LONG CONSTANT PR$_XSID_N8500 = 7 ! VAX 8500 DECLARE LONG CONSTANT PR$_XSID_N8NNN = -1 ! Unknown Nautilus CPU ! VAX 11/780 IPR'S: DECLARE LONG CONSTANT PR$_WCSA = 44 ! WCS ADDRESS REGISTER DECLARE LONG CONSTANT PR$_WCSD = 45 ! WCS DATA REGISTER DECLARE LONG CONSTANT PR$_SBIFS = 48 ! SBI FAULT STATUS REGISTER DECLARE LONG CONSTANT PR$_SBIS = 49 ! SBI SILO REGISTER DECLARE LONG CONSTANT PR$_SBISC = 50 ! SBI COMPARATOR REGISTER DECLARE LONG CONSTANT PR$_SBIMT = 51 ! SBI MAINTENANCE REGISTER DECLARE LONG CONSTANT PR$_SBIER = 52 ! SBI ERROR REGISTER DECLARE LONG CONSTANT PR$_SBITA = 53 ! SBI TIMEOUT ADDRESS REGISTER DECLARE LONG CONSTANT PR$_SBIQC = 54 ! SBI QUADWORD CLEAR REGISTER ! END OF VAX 11/780-SPECIFIC IPR'S DECLARE LONG CONSTANT PR$_CMIERR = 23 ! CMI ERROR SUMMARY REGISTER DECLARE LONG CONSTANT PR$_CSRS = 28 ! CONSOLE BLK STORE RCV STATUS DECLARE LONG CONSTANT PR$_CSRD = 29 ! CONSOLE BLK STORE RCV DATA DECLARE LONG CONSTANT PR$_CSTS = 30 ! CONSOLE BLK STORE XMIT STATUS DECLARE LONG CONSTANT PR$_CSTD = 31 ! CONSOLE BLK STORE XMIT DATA DECLARE LONG CONSTANT PR$_TBDR = 36 ! TB DISABLE REGISTER DECLARE LONG CONSTANT PR$_CADR = 37 ! CACHE DISABLE REGISTER DECLARE LONG CONSTANT PR$_MCESR = 38 ! MACHINE CHECK ERROR SUMMARY REG DECLARE LONG CONSTANT PR$_CAER = 39 ! CACHE ERROR REGISTER DECLARE LONG CONSTANT PR$_UBRESET = 55 ! UNIBUS I/O RESET REGISTER ! END OF 11/750 AND 11/730 IPR'S DECLARE LONG CONSTANT PR$_PAMACC = 64 ! PAMM ACCESS DECLARE LONG CONSTANT PR$_PAMLOC = 65 ! PAMM LOCATION DECLARE LONG CONSTANT PR$_CSWP = 66 ! CACHE SWEEP REGISTER DECLARE LONG CONSTANT PR$_MDECC = 67 ! MBOX DATA ECC REGISTER DECLARE LONG CONSTANT PR$_MENA = 68 ! MBOX ERROR ENABLE REGISTER DECLARE LONG CONSTANT PR$_MDCTL = 69 ! MBOX DATA CONTROL REGISTER DECLARE LONG CONSTANT PR$_MCCTL = 70 ! MBOX MCC CONTROL REGISTER DECLARE LONG CONSTANT PR$_MERG = 71 ! MBOX ERROR GENERATOR REGISTER DECLARE LONG CONSTANT PR$_CRBT = 72 ! CONSOLE REBOOT DECLARE LONG CONSTANT PR$_DFI = 73 ! DIAGNOSTIC FAULT INSERTION DECLARE LONG CONSTANT PR$_EHSR = 74 ! ERROR HANDLING STATUS REGISTER DECLARE LONG CONSTANT PR$_ACCS790 = 75 ! ACCELERATOR STATUS REGISTER DECLARE LONG CONSTANT PR$_STXCS = 76 ! CONSOLE STORAGE CONTROL REG DECLARE LONG CONSTANT PR$_STXDB = 77 ! CONSOLE STORAGE DATA REGISTER DECLARE LONG CONSTANT PR$_LSPA = 78 ! SCRATCHPAD ADDRESS DECLARE LONG CONSTANT PR$_RSPD = 79 ! SCRATCHPAD DATA ! END OF 11/790 PROCESSOR-SPECIFIC IPRS DECLARE LONG CONSTANT PR$S_PRDEF = 4 record PRDEF variant case group PR$R_PRDEF_BITS ! SERIAL NUMBER FIELD ! PLANT ID ! ECO LEVEL ! CPU TYPE CODE LONG SID_SN_bits ! COMMENT ADDED BY SDL - SID_SN_bits contains bits SID_SN through SID_TYPE end group PR$R_PRDEF_BITS case group PR$R_PRDEF_XBITS ! CPU-SPECIFIC XSID BITS ! CPU SUBTYPE CODE LONG FILL_XSID_BITS_bits ! COMMENT ADDED BY SDL - FILL_XSID_BITS_bits contains bits FILL_XSID_BITS through & ! XSID_TYPE end group PR$R_PRDEF_XBITS ! SYSTEM ID REGISTER CPU TYPES ! Number assignments are ! based upon the jumpers ! read by the console from ! the MPS backplane ! VAX 11/750 AND 11/730 IPR'S: ! VAX 11/790 PROCESSOR-SPECIFIC IPRS end variant end record PRDEF