%IF %DECLARED ( %BASIC$QUADWORD_DECLARED ) = 0 %THEN RECORD BASIC$QUADWORD LONG FILL ( 2 ) END RECORD %LET %BASIC$QUADWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$OCTAWORD_DECLARED ) = 0 %THEN RECORD BASIC$OCTAWORD LONG FILL ( 4 ) END RECORD %LET %BASIC$OCTAWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$F_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$F_FLOATING_COMPLEX SINGLE REAL_PART SINGLE IMAGINARY_PART END RECORD %LET %BASIC$F_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$D_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$D_FLOATING_COMPLEX DOUBLE REAL_PART DOUBLE IMAGINARY_PART END RECORD %LET %BASIC$D_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$G_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$G_FLOATING_COMPLEX GFLOAT REAL_PART GFLOAT IMAGINARY_PART END RECORD %LET %BASIC$G_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$H_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$H_FLOATING_COMPLEX HFLOAT REAL_PART HFLOAT IMAGINARY_PART END RECORD %LET %BASIC$H_FLOATING_COMPLEX_DECL = 1 %END %IF DECLARE LONG CONSTANT PR9AQ$C_CONSIPL = 20 ! IPL for all Console Registers DECLARE LONG CONSTANT PR9AQ$C_CLKIPL = 22 ! IPL for Interval Clock DECLARE LONG CONSTANT PR9AQ$C_IP_IPL = 22 ! IPL for Interprocessor Interrupts DECLARE LONG CONSTANT PR9AQ$_NICR = 25 ! Next Interval Count Register DECLARE LONG CONSTANT PR9AQ$_ICR = 26 ! Interval Counter Register DECLARE LONG CONSTANT PR9AQ$_TODR = 27 ! Time of Year DECLARE LONG CONSTANT PR9AQ$_PME = 61 ! Performance Monitor Enable DECLARE LONG CONSTANT PR9AQ$_CSWP = 66 ! Cache Sweep DECLARE LONG CONSTANT PR9AQ$_CRBT = 72 ! Console Reboot DECLARE LONG CONSTANT PR9AQ$_CPUCNF = 106 ! CPU Configuration DECLARE LONG CONSTANT PR9AQ$_ICIR = 107 ! Interrupt Other Processor DECLARE LONG CONSTANT PR9AQ$_RXFCT = 108 ! Receive Function Register DECLARE LONG CONSTANT PR9AQ$_RXPRM = 109 ! Receive Parameter Register DECLARE LONG CONSTANT PR9AQ$_TXFCT = 110 ! Transmit Function Register DECLARE LONG CONSTANT PR9AQ$_TXPRM = 111 ! Transmit Parameter Register DECLARE LONG CONSTANT PR9AQ$C_CSWP_INIT = 1 ! Initiate Cache Sweep DECLARE LONG CONSTANT PR9AQ$C_CRBT_CODE = 1 ! Reboot Code for CRBT_CODE DECLARE LONG CONSTANT PR9AQ$C_TXFCT_GETHDWCTX = 1 ! Get Hardware Context DECLARE LONG CONSTANT PR9AQ$C_TXFCT_VBFIO = 2 ! Virtual Block File I/O DECLARE LONG CONSTANT PR9AQ$C_TXFCT_KEEPALIVE = 3 ! Keep Alive DECLARE LONG CONSTANT PR9AQ$C_TXFCT_SENDDG = 4 ! Send Datagram DECLARE LONG CONSTANT PR9AQ$C_TXFCT_RETDGSTS = 5 ! Return DG Status DECLARE LONG CONSTANT PR9AQ$C_TXFCT_SWITCHPRI = 6 ! Switch Primary CPU DECLARE LONG CONSTANT PR9AQ$C_TXFCT_REBOOTSYS = 7 ! Reboot System DECLARE LONG CONSTANT PR9AQ$C_TXFCT_CLRWRMSTR = 8 ! Clear Warm Start Flag DECLARE LONG CONSTANT PR9AQ$C_TXFCT_CLRCLDSTR = 9 ! Clear Cold Start Flag DECLARE LONG CONSTANT PR9AQ$C_TXFCT_BOOTSEC = 10 ! Boot/Reboot Secondary CPU DECLARE LONG CONSTANT PR9AQ$C_TXFCT_HLTREMAVL = 11 ! Halt CPU, Remove from Available Set DECLARE LONG CONSTANT PR9AQ$C_TXFCT_HLTKEPAVL = 12 ! Halt CPU, Keep in Available Set DECLARE LONG CONSTANT PR9AQ$C_TXFCT_CONSQUIET = 14 ! Shut Down Non-Primary Switch XMITs DECLARE LONG CONSTANT PR9AQ$C_TXFCT_SETINTMOD = 15 ! Set Interrupt Mode DECLARE LONG CONSTANT PR9AQ$C_TXFCT_ABORTDL = 16 ! Abort Datalink ( s ) DECLARE LONG CONSTANT PR9AQ$C_TXFCT_RESETIO = 17 ! Reset I/O System DECLARE LONG CONSTANT PR9AQ$C_TXFCT_DSABLVBOX = 18 ! Disable VBOX DECLARE LONG CONSTANT PR9AQ$C_TXFCT_SETKEPALV = 19 ! Set Console Keep-Alive State DECLARE LONG CONSTANT PR9AQ$C_TXFCT_ERLENA = 20 ! Flush pending errorlog entries DECLARE LONG CONSTANT PR9AQ$C_TXFCT_GETSYSTYPE = 21 ! Return value of systype register DECLARE LONG CONSTANT PR9AQ$C_RXFCT_REMOVECPU = 2 ! Remove Processor DECLARE LONG CONSTANT PR9AQ$C_RXFCT_ADDCPU = 3 ! Add Processor DECLARE LONG CONSTANT PR9AQ$C_RXFCT_MARKBADPG = 4 ! Mark Memory Page Bad DECLARE LONG CONSTANT PR9AQ$C_RXFCT_REQMEMORY = 5 ! Request Memory Pages DECLARE LONG CONSTANT PR9AQ$C_RXFCT_SNDERLENT = 6 ! Send Error Log Entry DECLARE LONG CONSTANT PR9AQ$C_RXFCT_SNDOPCMSG = 7 ! Send OPCOM Message DECLARE LONG CONSTANT PR9AQ$C_RXFCT_GETDGBUF = 8 ! Get Datagram Buffer DECLARE LONG CONSTANT PR9AQ$C_RXFCT_SENDDG = 9 ! Send Datagram DECLARE LONG CONSTANT PR9AQ$C_RXFCT_RETDGSTS = 10 ! Return DG Status DECLARE LONG CONSTANT PR9AQ$C_RXFCT_SETKEPALV = 11 ! Set Keep-alive State DECLARE LONG CONSTANT PR9AQ$C_RXFCT_ABORTDL = 12 ! Abort Datalink ( s ) DECLARE LONG CONSTANT PR9AQ$C_RXFCT_ERRORINT = 13 ! Error Interrupt DECLARE LONG CONSTANT PR9AQ_XSID$M_ARCH_ID = x'000000FF' DECLARE LONG CONSTANT PR9AQ_XSID$M_VECTOR = x'00000100' DECLARE LONG CONSTANT PR9AQ_XSID$M_CPUS = x'00000600' DECLARE LONG CONSTANT PR9AQ_XSID$M_MMODEL = x'00001800' DECLARE LONG CONSTANT PR9AQ_XSID$M_SYS_TYPE = x'7F800000' DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_AQUARIUS = 0 DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_AQUARIUSII = 1 DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_AQUARIUSIII = 2 DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_ARIDUS = 8 DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_ARIDUSII = 9 DECLARE LONG CONSTANT PR9AQ$C_SYSTYPE_ARIDUSIII = 10 DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU_AVL = x'0000000F' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU_PSED = x'000000F0' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_VBOX_AVL = x'00000F00' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_XJA_AVL = x'0000F000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_34_BIT = x'00010000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_PRIMARY = x'00060000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_RRINTR = x'00080000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_MMU0_ENA = x'00100000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_MMU1_ENA = x'00200000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_ICU0_ENA = x'00400000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_ICU1_ENA = x'00800000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU0_CON = x'01000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU0_IE = x'02000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU1_CON = x'04000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU1_IE = x'08000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU2_CON = x'10000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU2_IE = x'20000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU3_CON = x'40000000' DECLARE LONG CONSTANT PR9AQ$M_CPUCNF_CPU3_IE = x'80000000' DECLARE LONG CONSTANT PR9AQ$C_CPUCNF_FLUID = -16252688 ! Fluid bits ! (CPUx_IE/CPUx_CON/RRINTR/ DECLARE LONG CONSTANT PR9AQ$M_TXFCT_STATUS = x'20000000' DECLARE LONG CONSTANT PR9AQ$M_TXFCT_INTENA = x'40000000' DECLARE LONG CONSTANT PR9AQ$M_TXFCT_READY = x'80000000' DECLARE LONG CONSTANT PR9AQ$M_RXFCT_STATUS = x'20000000' DECLARE LONG CONSTANT PR9AQ$M_RXFCT_INTENA = x'40000000' DECLARE LONG CONSTANT PR9AQ$M_RXFCT_VALID = x'80000000' DECLARE LONG CONSTANT PR9AQ$S_PR9AQDEF = 4 record PR9AQDEF variant case group PR9AQ$R_PR9AQSID_BITS ! Read only SID register ! Processor Serial Number ! Mfg Plant Code ! Expanded system type code ! System Revision Level ! System Type Code ! CPU Type Code LONG SID_SERIAL_bits ! COMMENT ADDED BY SDL - SID_SERIAL_bits contains bits SID_SERIAL through SID_TYPE end group PR9AQ$R_PR9AQSID_BITS case group PR9AQ$R_PR9AQXSID_BITS ! Timeshare (1) / Server (2) ! Vector capable ! # CPUs installed -1 ! Marketing model type ! Reserved ! System type LONG ARCH_ID_bits ! COMMENT ADDED BY SDL - ARCH_ID_bits contains bits ARCH_ID through fill_93 end group PR9AQ$R_PR9AQXSID_BITS case group PR9AQ$R_PR9AQCPUCNF_BITS ! CPU Configuration Register ! CPU 0-3 Available ! CPU 0-3 Paused ! CPU 0-3 VBOX Configured and Available ! XJA 0-3 Available ! Addressing Mode = 34 bits ! Primary CPU Number ! Round Robin Interrupts ! MMU0 Enabled ! MMU1 Enabled ! ICU0 Enabled ! ICU1 Enabled ! CPU0 Connected ! CPU0 I/O Interrupts Enabled ! CPU1 Connected ! CPU1 I/O Interrupts Enabled ! CPU2 Connected ! CPU2 I/O Interrupts Enabled ! CPU3 Connected ! CPU3 I/O Interrupts Enabled LONG CPUCNF_CPU_AVL_bits ! COMMENT ADDED BY SDL - CPUCNF_CPU_AVL_bits contains bits CPUCNF_CPU_AVL through & ! CPUCNF_CPU3_IE end group PR9AQ$R_PR9AQCPUCNF_BITS ! CPUx_PSED) case group PR9AQ$R_PR9AQTXFCT_BITS ! TXFCT register ! Function Code ! SPARAM ! Unused ! Status Bit ! Interrupt Enable Bit ! Ready Bit LONG TXFCT_FUNCT_bits ! COMMENT ADDED BY SDL - TXFCT_FUNCT_bits contains bits TXFCT_FUNCT through TXFCT_READY end group PR9AQ$R_PR9AQTXFCT_BITS case group PR9AQ$R_PR9AQRXFCT_BITS ! RXFCT register ! Function Code ! SPARAM ! Unused ! Status Bit ! Interrupt Enable Bit ! Valid Bit LONG RXFCT_FUNCT_bits ! COMMENT ADDED BY SDL - RXFCT_FUNCT_bits contains bits RXFCT_FUNCT through RXFCT_VALID end group PR9AQ$R_PR9AQRXFCT_BITS end variant end record PR9AQDEF