%IF %DECLARED ( %BASIC$QUADWORD_DECLARED ) = 0 %THEN
	RECORD BASIC$QUADWORD
		LONG FILL ( 2 )
	END RECORD
    %LET %BASIC$QUADWORD_DECLARED = 1
    %END %IF
    %IF %DECLARED ( %BASIC$OCTAWORD_DECLARED ) = 0 %THEN
	RECORD BASIC$OCTAWORD
		LONG FILL ( 4 )
	END RECORD
    %LET %BASIC$OCTAWORD_DECLARED = 1
    %END %IF
    %IF %DECLARED ( %BASIC$F_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$F_FLOATING_COMPLEX
    		SINGLE REAL_PART
    		SINGLE IMAGINARY_PART
    	END RECORD
    %LET %BASIC$F_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$D_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$D_FLOATING_COMPLEX
    		DOUBLE REAL_PART
    		DOUBLE IMAGINARY_PART
    	END RECORD
    %LET %BASIC$D_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$G_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$G_FLOATING_COMPLEX
    		GFLOAT REAL_PART
    		GFLOAT IMAGINARY_PART
    	END RECORD
    %LET %BASIC$G_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$H_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$H_FLOATING_COMPLEX
    		HFLOAT REAL_PART
    		HFLOAT IMAGINARY_PART
    	END RECORD
    %LET %BASIC$H_FLOATING_COMPLEX_DECL = 1
    %END %IF
    
    
      DECLARE LONG CONSTANT PR8PS$M_RXDB_P0AVL = x'00000001'
      DECLARE LONG CONSTANT PR8PS$M_RXDB_P1AVL = x'00000002'
      DECLARE LONG CONSTANT PR8PS$M_RXDB_P2AVL = x'00000004'
      DECLARE LONG CONSTANT PR8PS$M_RXDB_P3AVL = x'00000008'
      DECLARE LONG CONSTANT PR8PS$M_RXDB_DKEY = x'00000010'
      DECLARE LONG CONSTANT PR8PS$M_RXDB_VKEY = x'00000020'
      DECLARE LONG CONSTANT PR8PS$S_PR8PSDEF = 4
      record PR8PSDEF
         variant
            case
               group PR8PS$R_PR8PSSID_BITS  !  Read only SID register
                   !  Processor Serial Number
                   !  CPU Revision Level
                   !  CPU number (0-3)
                   !  CPU Type Code
                  LONG SID_SERIAL_bits   ! COMMENT ADDED BY SDL - SID_SERIAL_bits contains bits SID_SERIAL through SID_TYPE
               end group PR8PS$R_PR8PSSID_BITS
    !                    
    ! 	Bit definitions for data returned by the GET_CPU_INFO console command
    ! 	through the RXDB IPR.
    ! 
            case
               group PR8PS$R_PR8PSRXDB_BITS1  ! 
                   !  Processor 0 avail 
                   !  Processor 1 avail 
                   !  Processor 2 avail 
                   !  Processor 3 avail 
                   !  Diag key
                   !  VMS key
                   !  Processor num of primary
                  BYTE RXDB_P0AVL_bits   ! COMMENT ADDED BY SDL - RXDB_P0AVL_bits contains bits RXDB_P0AVL through RXDB_PRIMID
               end group PR8PS$R_PR8PSRXDB_BITS1
    ! 
    !  Definitions for Polarstar REVR2
    ! 
            case
               group PR8PS$R_PR8PSREVR2_BITS  !  Read only REVR2 register
                   !  PCLK revision level
                   !  Backplane revision
                   !  Console Revision Level
                   !  WCS Revision Level
                   !  Microcode Revision Level
                  LONG REVR2_PCLK_bits   ! COMMENT ADDED BY SDL - REVR2_PCLK_bits contains bits REVR2_PCLK through REVR2_UCODE
               end group PR8PS$R_PR8PSREVR2_BITS
         end variant
      end record PR8PSDEF
    
    ! 
    !  Definitions for extended Polarstar commands
    ! 
      DECLARE LONG CONSTANT TXDB$K_BOOT_CPU_0 = 20  !  14 - Boot CPU 0
      DECLARE LONG CONSTANT TXDB$K_BOOT_CPU_1 = 21  !  15 - Boot CPU 1
      DECLARE LONG CONSTANT TXDB$K_BOOT_CPU_2 = 22  !  16 - Boot CPU 2
      DECLARE LONG CONSTANT TXDB$K_BOOT_CPU_3 = 23  !  17 - Boot CPU 3
      DECLARE LONG CONSTANT TXDB$K_DISAB_CPU_0 = 24  !  18 - Disable CPU 0
      DECLARE LONG CONSTANT TXDB$K_DISAB_CPU_1 = 25  !  19 - Disable CPU 1
      DECLARE LONG CONSTANT TXDB$K_DISAB_CPU_2 = 26  !  1A - Disable CPU 2
      DECLARE LONG CONSTANT TXDB$K_DISAB_CPU_3 = 27  !  1B - Disable CPU 3
      DECLARE LONG CONSTANT TXDB$K_FNP_CPU_0 = 28  !  1C - Force Next Primary to be CPU 0
      DECLARE LONG CONSTANT TXDB$K_FNP_CPU_1 = 29  !  1D - Force Next Primary to be CPU 1
      DECLARE LONG CONSTANT TXDB$K_FNP_CPU_2 = 30  !  1E - Force Next Primary to be CPU 2
      DECLARE LONG CONSTANT TXDB$K_FNP_CPU_3 = 31  !  1F - Force Next Primary to be CPU 3
      DECLARE LONG CONSTANT TXDB$K_CSA1_INFO = 32  !  20 - Get info on CSA1 [not implemented]
      DECLARE LONG CONSTANT TXDB$K_CSA2_INFO = 33  !  21 - Get info on CSA2 [not implemented]
      DECLARE LONG CONSTANT TXDB$K_CSA3_INFO = 34  !  22 - Get info on CSA3