%IF %DECLARED ( %BASIC$QUADWORD_DECLARED ) = 0 %THEN RECORD BASIC$QUADWORD LONG FILL ( 2 ) END RECORD %LET %BASIC$QUADWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$OCTAWORD_DECLARED ) = 0 %THEN RECORD BASIC$OCTAWORD LONG FILL ( 4 ) END RECORD %LET %BASIC$OCTAWORD_DECLARED = 1 %END %IF %IF %DECLARED ( %BASIC$F_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$F_FLOATING_COMPLEX SINGLE REAL_PART SINGLE IMAGINARY_PART END RECORD %LET %BASIC$F_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$D_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$D_FLOATING_COMPLEX DOUBLE REAL_PART DOUBLE IMAGINARY_PART END RECORD %LET %BASIC$D_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$G_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$G_FLOATING_COMPLEX GFLOAT REAL_PART GFLOAT IMAGINARY_PART END RECORD %LET %BASIC$G_FLOATING_COMPLEX_DECL = 1 %END %IF %IF %DECLARED ( %BASIC$H_FLOATING_COMPLEX_DECL ) = 0 %THEN RECORD BASIC$H_FLOATING_COMPLEX HFLOAT REAL_PART HFLOAT IMAGINARY_PART END RECORD %LET %BASIC$H_FLOATING_COMPLEX_DECL = 1 %END %IF DECLARE LONG CONSTANT PR730$_NICR = 25 ! INTERVAL CLOCK NEXT INTERVAL REGISTER DECLARE LONG CONSTANT PR730$_ICR = 26 ! INTERVAL CLOCK INTERVAL COUNT REGISTER DECLARE LONG CONSTANT PR730$_TODR = 27 ! TIME OF DAY REGISTER DECLARE LONG CONSTANT PR730$_ACCS = 40 ! ACCELERATOR CONTROL STATUS REGISTER DECLARE LONG CONSTANT PR730$_ACCR = 41 ! ACCELERATOR RESERVED DECLARE LONG CONSTANT PR730$_PME = 61 ! PERFORMANCE MONITOR ENABLE DECLARE LONG CONSTANT PR730$_CMIERR = 23 ! CMI ERROR SUMMARY REGISTER DECLARE LONG CONSTANT PR730$_CSRS = 28 ! CONSOLE BLK STORE RCV STATUS DECLARE LONG CONSTANT PR730$_CSRD = 29 ! CONSOLE BLK STORE RCV DATA DECLARE LONG CONSTANT PR730$_CSTS = 30 ! CONSOLE BLK STORE XMIT STATUS DECLARE LONG CONSTANT PR730$_CSTD = 31 ! CONSOLE BLK STORE XMIT DATA DECLARE LONG CONSTANT PR730$_TBDR = 36 ! TB DISABLE REGISTER DECLARE LONG CONSTANT PR730$_CADR = 37 ! CACHE DISABLE REGISTER DECLARE LONG CONSTANT PR730$_MCESR = 38 ! MACHINE CHECK ERROR SUMMARY REG DECLARE LONG CONSTANT PR730$_CAER = 39 ! CACHE ERROR REGISTER DECLARE LONG CONSTANT PR730$_UBRESET = 55 ! UNIBUS I/O RESET REGISTER