%IF %DECLARED ( %BASIC$QUADWORD_DECLARED ) = 0 %THEN
	RECORD BASIC$QUADWORD
		LONG FILL ( 2 )
	END RECORD
    %LET %BASIC$QUADWORD_DECLARED = 1
    %END %IF
    %IF %DECLARED ( %BASIC$OCTAWORD_DECLARED ) = 0 %THEN
	RECORD BASIC$OCTAWORD
		LONG FILL ( 4 )
	END RECORD
    %LET %BASIC$OCTAWORD_DECLARED = 1
    %END %IF
    %IF %DECLARED ( %BASIC$F_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$F_FLOATING_COMPLEX
    		SINGLE REAL_PART
    		SINGLE IMAGINARY_PART
    	END RECORD
    %LET %BASIC$F_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$D_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$D_FLOATING_COMPLEX
    		DOUBLE REAL_PART
    		DOUBLE IMAGINARY_PART
    	END RECORD
    %LET %BASIC$D_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$G_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$G_FLOATING_COMPLEX
    		GFLOAT REAL_PART
    		GFLOAT IMAGINARY_PART
    	END RECORD
    %LET %BASIC$G_FLOATING_COMPLEX_DECL = 1
    %END %IF
    %IF %DECLARED ( %BASIC$H_FLOATING_COMPLEX_DECL ) = 0 %THEN
    	RECORD BASIC$H_FLOATING_COMPLEX
    		HFLOAT REAL_PART
    		HFLOAT IMAGINARY_PART
    	END RECORD
    %LET %BASIC$H_FLOATING_COMPLEX_DECL = 1
    %END %IF
    
    
      DECLARE LONG CONSTANT PR1202$_ICCS = 24  !  Interval Clock Control/Status
      DECLARE LONG CONSTANT PR1202_ICCS$M_IE = x'00000040'
      DECLARE LONG CONSTANT PR1202$_TODR = 27  !  Time of Year Clock
      DECLARE LONG CONSTANT PR1202$_RXCS = 32  !  Console Receiver Control/Status
      DECLARE LONG CONSTANT PR1202_RXCS$M_RX_IE = x'00000040'
      DECLARE LONG CONSTANT PR1202_RXCS$M_RX_DONE = x'00000080'
      DECLARE LONG CONSTANT PR1202$_RXDB = 33  !  Console Receiver Data Buffer
      DECLARE LONG CONSTANT PR1202_RXDB$M_DATA = x'000000FF'
      DECLARE LONG CONSTANT PR1202_RXDB$M_RCV_BRK = x'00000800'
      DECLARE LONG CONSTANT PR1202_RXDB$M_FRM_ERR = x'00002000'
      DECLARE LONG CONSTANT PR1202_RXDB$M_OVR_ERR = x'00004000'
      DECLARE LONG CONSTANT PR1202_RXDB$M_ERR = x'00008000'
      DECLARE LONG CONSTANT PR1202$_TXCS = 34  !  Console Transmit Control/Status
      DECLARE LONG CONSTANT PR1202_TXCS$M_XMIT_BRK = x'00000001'
      DECLARE LONG CONSTANT PR1202_TXCS$M_LOOPBACK = x'00000004'
      DECLARE LONG CONSTANT PR1202_TXCS$M_TX_IE = x'00000040'
      DECLARE LONG CONSTANT PR1202_TXCS$M_TX_RDY = x'00000080'
      DECLARE LONG CONSTANT PR1202$_TXDB = 35  !  Console Transmit Data Buffer
      DECLARE LONG CONSTANT PR1202_TXDB$M_DATA = x'000000FF'
      DECLARE LONG CONSTANT PR1202$_MCESR = 38  !  Machine Check Error Register
      DECLARE LONG CONSTANT PR1202$_ACCS = 40  !  Floating Point Accelerator Register
      DECLARE LONG CONSTANT PR1202_ACCS$M_VECTOR_PRESENT = x'00000001'
      DECLARE LONG CONSTANT PR1202_ACCS$M_FCHIP_PRESENT = x'00000002'
      DECLARE LONG CONSTANT PR1202_ACCS$M_EADDR_MODE = x'00000004'
      DECLARE LONG CONSTANT PR1202_ACCS$M_WRITE_EVEN_PARITY = x'80000000'
      DECLARE LONG CONSTANT PR1202$_SAVPC = 42  !  Console SAVED PC
      DECLARE LONG CONSTANT PR1202$_SAVPSL = 43  !  Console SAVED PSL
      DECLARE LONG CONSTANT PR1202_SAVPSL$M_HALT_CODE = x'00003F00'
      DECLARE LONG CONSTANT PR1202_SAVPSL$M_INVALID = x'00004000'
      DECLARE LONG CONSTANT PR1202_SAVPSL$M_MAPEN = x'00008000'
      DECLARE LONG CONSTANT PR1202$_TBTAG = 47  !  Translation Buffer Tag
      DECLARE LONG CONSTANT PR1202$_IORESET = 55  !  IO BUS RESET
      DECLARE LONG CONSTANT PR1202$_TBDATA = 59  !  Translation Buffer Data
      DECLARE LONG CONSTANT PR1202$_SID = 62  !  System Identification Register 
      DECLARE LONG CONSTANT PR1202_SID$M_UCODE_REV = x'000000FF'
      DECLARE LONG CONSTANT PR1202_SID$M_UCODE_OPT = x'0000FF00'
      DECLARE LONG CONSTANT PR1202_SID$M_CPU_TYPE = x'FF000000'
      DECLARE LONG CONSTANT PR1202_XSID$M_ARCH_ID = x'000000FF'
      DECLARE LONG CONSTANT PR1202_XSID$M_SYS_VAR = x'0000FF00'
      DECLARE LONG CONSTANT PR1202_XSID$M_CONSOLE_REV = x'00FF0000'
      DECLARE LONG CONSTANT PR1202_XSID$M_SYS_TYPE = x'FF000000'
      DECLARE LONG CONSTANT PR1202$_BCIDX = 112  !  Backup Cache Index Register
      DECLARE LONG CONSTANT PR1202_BCIDX$M_BCIDX = x'0007FF80'
      DECLARE LONG CONSTANT PR1202_BCIDX$M_COLUMN = x'00000780'
      DECLARE LONG CONSTANT PR1202_BCIDX$M_ROW = x'0007F800'
      DECLARE LONG CONSTANT PR1202$_BCSTS = 113  !  Backup Cache Status Register
      DECLARE LONG CONSTANT PR1202_BCSTS$M_ERR_SUMMARY = x'00000001'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_BTS_TPERR = x'00000002'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_BTS_VDPERR = x'00000004'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_I_PERR = x'00000030'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_FILL_ABORT = x'00000040'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_AC_PERR = x'00000080'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_SECOND_ERR = x'00000100'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_BTS_HIT = x'00008000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_BTS_COMPARE = x'00010000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_PPG = x'00020000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_PTS_PARITY = x'000C0000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_IBUS_CYCLE = x'00100000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_IBUS_CMD = x'00200000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_DAL_CMD = x'03C00000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_DMG_L = x'04000000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_SYNC_L = x'08000000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_AC_PARITY = x'10000000'
      DECLARE LONG CONSTANT PR1202_BCSTS$M_OREAD_PENDING = x'20000000'
      DECLARE LONG CONSTANT PR1202$_BCCTL = 114  !  Backup Cache Control Register
      DECLARE LONG CONSTANT PR1202_BCCTL$M_FORCE_BHIT = x'00000001'
      DECLARE LONG CONSTANT PR1202_BCCTL$M_ENABLE_BTS = x'00000002'
      DECLARE LONG CONSTANT PR1202_BCCTL$M_BTS_ERROR_TRAN = x'00000004'
      DECLARE LONG CONSTANT PR1202_BCCTL$M_GEN_BAD_ACP = x'00000008'
      DECLARE LONG CONSTANT PR1202$_BCERA = 115  !  Error address register
      DECLARE LONG CONSTANT PR1202$_BCBTS = 116  !  Backup Cache Tag Store
      DECLARE LONG CONSTANT PR1202_BCBTS$M_VALID = x'0000000F'
      DECLARE LONG CONSTANT PR1202_BCBTS$M_DIRTY = x'000000F0'
      DECLARE LONG CONSTANT PR1202_BCBTS$M_VD_PARITY = x'00000100'
      DECLARE LONG CONSTANT PR1202_BCBTS$M_TAG_PARITY = x'00000200'
      DECLARE LONG CONSTANT PR1202_BCBTS$M_TAG = x'7FF80000'
      DECLARE LONG CONSTANT PR1202$_BCDET = 117  !  Deallocate tag register
      DECLARE LONG CONSTANT PR1202$_BCERT = 118  !  Current parity bits
      DECLARE LONG CONSTANT PR1202_BCERT$M_VALID = x'0000000F'
      DECLARE LONG CONSTANT PR1202_BCERT$M_DIRTY = x'000000F0'
      DECLARE LONG CONSTANT PR1202_BCERT$M_VD_DIRTY = x'00000100'
      DECLARE LONG CONSTANT PR1202_BCERT$M_TAG_PARITY = x'00000200'
      DECLARE LONG CONSTANT PR1202_BCERT$M_CACHE_ENTRY = x'7FF80000'
      DECLARE LONG CONSTANT PR1202$_BC119 = 119  !  Backup Cache Reserved Reister
      DECLARE LONG CONSTANT PR1202$_BC120 = 120  !  Backup Cache Reserved Reister
      DECLARE LONG CONSTANT PR1202$_BC121 = 121  !  Backup Cache Reserved Reister
      DECLARE LONG CONSTANT PR1202$_BC122 = 122  !  Backup Cache Reserved Reister
      DECLARE LONG CONSTANT PR1202$_VINTSR = 123  !  Vector Interface Error Status Reg.
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VP_ABSENT = x'00000001'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VP_SERR = x'00000002'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VP_HERR = x'00000004'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VECTL_VIB_SERR = x'00000008'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VECTL_VIB_HERR = x'00000010'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_CCHIP_VIB_SERR = x'00000020'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_CCHIP_VIB_HERR = x'00000040'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_BUS_TIMEOUT = x'00000080'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_VP_RESET = x'00000100'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_DIS_VP_INTF = x'00000200'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_BAD_DPARITY = x'00000400'
      DECLARE LONG CONSTANT PR1202_VINTSR$M_BAD_CPARITY = x'00000800'
      DECLARE LONG CONSTANT PR1202$_PCTAG = 124  !  Primary Cache Tag Store
      DECLARE LONG CONSTANT PR1202_PCTAG$M_VALID = x'00000001'
      DECLARE LONG CONSTANT PR1202_PCTAG$M_TAG = x'7FFFF800'
      DECLARE LONG CONSTANT PR1202_PCTAG$M_PARITY = x'80000000'
      DECLARE LONG CONSTANT PR1202$_PCIDX = 125  !  Primary Cache Index Register
      DECLARE LONG CONSTANT PR1202_PCIDX$M_IDX = x'000007F8'
      DECLARE LONG CONSTANT PR1202$_PCERR = 126  !  Primary Cache Error Address Register
      DECLARE LONG CONSTANT PR1202$_PCSTS = 127  !  Primary Cache Status Register
      DECLARE LONG CONSTANT PR1202_PCSTS$M_FORCE_HIT = x'00000001'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_ENABLE_PTS = x'00000002'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_FLUSH = x'00000004'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_P_CACHE_HIT = x'00000010'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_INTERRUPT = x'00000020'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_TRAP2 = x'00000040'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_TRAP1 = x'00000080'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_TAG_PARITY_ERR = x'00000100'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_DAL_PARITY_ERR = x'00000200'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_DATA_PARITY_ERR = x'00000400'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_BUS_ERR = x'00000800'
      DECLARE LONG CONSTANT PR1202_PCSTS$M_B_CACHE_HIT = x'00001000'
      DECLARE LONG CONSTANT PR1202S_PR1202DEF = 4
      record PR1202DEF
         variant
            case
               group PR1202R_PR1202ICCS_BITS
                   !  Interrupt enable
                  BYTE FILL_1_bits   ! COMMENT ADDED BY SDL - FILL_1_bits contains bits FILL_1 through fill_94
               end group PR1202R_PR1202ICCS_BITS
            case
               group PR1202R_PR1202RXCS_BITS
                   !  Interrupt enable
                   !  Receiver done
                  BYTE FILL_1_bits   ! COMMENT ADDED BY SDL - FILL_1_bits contains bits FILL_1 through RX_DONE
               end group PR1202R_PR1202RXCS_BITS
            case
               group PR1202R_PR1202RXDB_BITS
                   !  Received data
                   !  Break or CTRL/P received
                   !  Framing error
                   !  Overrun error
                   !  Error
                  WORD DATA_bits   ! COMMENT ADDED BY SDL - DATA_bits contains bits DATA through ERR
               end group PR1202R_PR1202RXDB_BITS
            case
               group PR1202R_PR1202TXCS_BITS
                   !  Transmit break
                   !  Loopback
                   !  Interrupt enable
                   !  Transmitter ready
                  BYTE XMIT_BRK_bits   ! COMMENT ADDED BY SDL - XMIT_BRK_bits contains bits XMIT_BRK through TX_RDY
               end group PR1202R_PR1202TXCS_BITS
            case
               group PR1202R_PR1202TXDB_BITS
                   !  Data to transmit
                  BYTE DATA_bits   ! COMMENT ADDED BY SDL - DATA_bits contains bits DATA through DATA
               end group PR1202R_PR1202TXDB_BITS
            case
               group PR1202R_PR1202ACCS_BITS
                   !  Vector unit present
                   !  F-Chip present
                   !  Selects 30-bit/32-bit mode
                   !  Write even parity
                  LONG VECTOR_PRESENT_bits   ! COMMENT ADDED BY SDL - VECTOR_PRESENT_bits contains bits VECTOR_PRESENT through  &
 ! WRITE_EVEN_PARITY
               end group PR1202R_PR1202ACCS_BITS
            case
               group PR1202R_PR1202SAVPSL_BITS
                   !  Halt code
                   !  Saved PSL invalid
                   !  Saved MAPEN
                  WORD FILL_1_bits   ! COMMENT ADDED BY SDL - FILL_1_bits contains bits FILL_1 through MAPEN
               end group PR1202R_PR1202SAVPSL_BITS
            case
               group PR1202R_PR1202SID_BITS
                   !  Microcode revision level 
                   !  Microcode option
                   !  CPU_TYPE (12 hex/18 decimal)
                  LONG UCODE_REV_bits   ! COMMENT ADDED BY SDL - UCODE_REV_bits contains bits UCODE_REV through CPU_TYPE
               end group PR1202R_PR1202SID_BITS
    !  XSID (SYS_TYPE) Register bits
            case
               group PR1202R_PR1202XSID_BITS
                   !  Timeshare/Server
                   !  System Variant
                   !  XMP console revision level 
                   !  System type (02)
                  LONG ARCH_ID_bits   ! COMMENT ADDED BY SDL - ARCH_ID_bits contains bits ARCH_ID through SYS_TYPE
               end group PR1202R_PR1202XSID_BITS
            case
               group PR1202R_PR1202BCIDX
                  group PR1202_BCIDX$R_BCIDX_OVERLAY
                     variant
                     case
                        group PR1202_BCIDX$R_BCIDX_BITS0
                            !  Backup cache tag index
                           LONG FILL_1_bits   ! COMMENT ADDED BY SDL - FILL_1_bits contains bits FILL_1 through fill_95
                        end group PR1202_BCIDX$R_BCIDX_BITS0
                     case
                        group PR1202_BCIDX$R_BCIDX1_BITS
                            !  Backup tag column index
                            !  Backup tag row index
                           LONG FILL_2_bits   ! COMMENT ADDED BY SDL - FILL_2_bits contains bits FILL_2 through fill_96
                        end group PR1202_BCIDX$R_BCIDX1_BITS
                     end variant
                  end group PR1202_BCIDX$R_BCIDX_OVERLAY
               end group PR1202R_PR1202BCIDX
            case
               group PR1202R_PR1202BCSTS_BITS
                   !  Error summary
                   !  Parity error in tag field
                   !  Parity error in V/D bit
                   !  IBUS parity error
                   !  Cache fill aborted
                   !  Address/Command parity error
                   !  Second error occured
                   !  Valid sublock hit
                   !  Results of tap comparison
                   !  Predicted parity generator
                   !  Parity generated on tag
                   !  Status register is loaded
                   !  Invalidate command siganl
                   !  Last DAL command
                   !  DMG from last DAL command
                   !  SYNC from last DAL command
                   !  Parity from last ABUS DAL
                   !  Pending OREAD during last DAL
                  LONG ERR_SUMMARY_bits   ! COMMENT ADDED BY SDL - ERR_SUMMARY_bits contains bits ERR_SUMMARY through fill_97
               end group PR1202R_PR1202BCSTS_BITS
            case
               group PR1202R_PR1202BCCTL_BITS
                   !  Force hit
                   !  Enable backup cache
                   !  Error transition
                   !  Generate incorrect parity
                  BYTE FORCE_BHIT_bits   ! COMMENT ADDED BY SDL - FORCE_BHIT_bits contains bits FORCE_BHIT through fill_98
               end group PR1202R_PR1202BCCTL_BITS
            case
               group PR1202R_PR1202BCBTS_BITS
                   !  Four valid bits
                   !  Four dirty bits
                   !  Valid/dirty parity bit
                   !  Tag parity bit
                   !  Cache tag
                  LONG VALID_bits   ! COMMENT ADDED BY SDL - VALID_bits contains bits VALID through FILL_2
               end group PR1202R_PR1202BCBTS_BITS
            case
               group PR1202R_PR1202BCERT_BITS
                   !  Valid bit
                   !  Dirty bit
                   !  Valid/dirty parity bit
                   !  Tag parity bit
                   !  Cache entry tag
                  LONG VALID_bits   ! COMMENT ADDED BY SDL - VALID_bits contains bits VALID through fill_99
               end group PR1202R_PR1202BCERT_BITS
            case
               group PR1202R_PR1202VINTSR_BITS
                   !  1=Vector Unit is present
                   !  Recoverable internal error
                   !  Unrecoverable internal error
                   !  Recoverable VIB error
                   !  Unrecoverable VIB error
                   !  MC-chip detected recoverable VIB error
                   !  MC-chip detected unrecoverable VIB error
                   !  MC-chip detected bus timeout to vec IPR read/write 
                   !  Vector module reset
                   !  Disable vector interface to MC-chip
                   !  Causes MC-chip to generate bad parity on data
                   !  Causes MC-chip to generate bad parity on command
                  WORD VP_ABSENT_bits   ! COMMENT ADDED BY SDL - VP_ABSENT_bits contains bits VP_ABSENT through fill_100
               end group PR1202R_PR1202VINTSR_BITS
            case
               group PR1202R_PR1202PCTAG_BITS
                   !  Valid bit
                   !  Cache tag
                   !  Parity bit
                  LONG VALID_bits   ! COMMENT ADDED BY SDL - VALID_bits contains bits VALID through PARITY
               end group PR1202R_PR1202PCTAG_BITS
            case
               group PR1202R_PR1202PCIDX_BITS
                   !  Tag index
                  WORD FILL_1_bits   ! COMMENT ADDED BY SDL - FILL_1_bits contains bits FILL_1 through fill_101
               end group PR1202R_PR1202PCIDX_BITS
            case
               group PR1202R_PR1202PCSTS_BITS
                   !  Force hit
                   !  Enable tag store (cache on)
                   !  Flush cache
                   !  Reference hit
                   !  Error interrupt pending
                   !  Double error lock
                   !  Error lock
                   !  Tag parity error
                   !  DAL data parity error
                   !  Data parity error
                   !  Bus error
                   !  Reference hit in Bcache
                  WORD FORCE_HIT_bits   ! COMMENT ADDED BY SDL - FORCE_HIT_bits contains bits FORCE_HIT through fill_102
               end group PR1202R_PR1202PCSTS_BITS
         end variant
      end record PR1202DEF