/sys$common/syshlp/helplib.hlb MACRO, VAX MACRO Assembler, Vector Instructions, VST  *Conan The Librarian (sorry for the slow response - running on an old VAX)

    Store Vector Register Data into Memory

    Format:

      VSTL   [/0|1]    Vc, base, stride

      VSTQ   [/0|1]    Vc, base, stride

    Architecture

    Format
    opcode   cntrl.rw, base.ab, stride.rl
    opcodes

    9CFD    VSTL      Store Longword Vector from Vector Register to
                      Memory

    9EFD    VSTQ      Store Quadword Vector from Vector Register to
                      Memory

    vector_control_word

             1 1 1 1 1
             5 4 3 2 1     8 7     4 3     0
            +-+-+-+-+-------+-------+-------+
            |M|M| | |       |       |       |
            |O|T|0|0|   0   |   0   |  Vc   |
            |E|F| | |       |       |       |
            +-+-+-+-+-------+-------+-------+
    exceptions

       access control violation
       translation not valid
       vector alignment
       modify

    operation
      addr <- base

      FOR i <- 0 TO VLR-1
        BEGIN
          IF {{MOE EQL 0} OR {{MOE EQL 1} AND {VMR<i> EQL MTF}}} THEN
            BEGIN
              IF {addr unaligned} THEN
                 {Vector Alignment Exception}

              IF VSTL THEN
                 (addr)<31:0> <- Vc[i]<31:0>
              IF VSTQ THEN
                 (addr)<63:0> <- Vc[i]
            END
          addr <- addr + stride               !Increment by stride
        END