/sys$common/syshlp/helplib.hlb MACRO, VAX MACRO Assembler, Vector Instructions, MFVP  *Conan The Librarian (sorry for the slow response - running on an old VAX)

         Move from Vector Processor

       Format:

       { MFVCR   }
       { MFVLR   }
       { MFVMRLO }
       {         }    dst
       { MFVMRHI }
       { SYNCH   }
       { MSYNCH  }
       {         }

    Architecture

    Format
    opcode   regnum.rw, dst.wl
    opcodes

    31FD    MFVP      Move from Vector Processor

    vector_control_word
    None.
    exceptions

       None.

    operation
      CASE regnum OF
         0:   dst <- ZEXT{VCR}
         1:   dst <- ZEXT{VLR}
         2:   dst <- VMR<31:0>
         3:   dst <- VMR<63:32>
         4:   SYNC
              dst <- UNPREDICTABLE
         5:   MSYNC
              dst <- UNPREDICTABLE
        >5:   Reserved
      END

    MFVP instructions that specify reserved values of the regnum
    operand produce UNPREDICTABLE results.