PBUS(3)PBUS(3)NAMEpbus - USR/3Com Edgeserver packet bus
SYNOPSIS
bind -a '#Y' /dev
/dev/pbus
/dev/pbusctl
DESCRIPTION
The packet bus driver serves a directory containing two files, giving
MAC-level access to the EPB version of the packet bus of the US Robot‐
ics (3Com) Edgeserver chassis.
The read-only file pbusctl contains a single integer that gives the
chassis slot occupied by the Edge server (its address on the packet
bus).
The file pbus is read and written to communicate on the bus. Each
write transmits a single packet on the bus. The driver expects a four
byte header in each write:
slot chan 0 0
where slot is the destination chassis slot number and chan identifies a
logical receiver in that slot. Including the header, the largest write
accepted is 128 bytes. The driver completes the header as the bus
firmware requires; it also pads each packet with zero bytes to a hard‐
ware packet boundary as it puts it on the bus. It flashes green in the
`Wan TX' LED as packets are transmitted.
Each read of the pbus file returns the contents of a single packet
received from the bus. The read will block if necessary until a packet
arrives. The data includes a four byte header as above, and padding to
a hardware packet boundary. Normally a higher-level protocol will pro‐
vide its own headers including an actual length.
At reset, the driver downloads firmware to the controller if required.
All invalid packets received are quietly discarded. Packets are also
dropped whenever an internal input queue overflows because the reader
has not kept up with arriving traffic.
SOURCE
/os/pc/devpbus.c
SEE ALSOplap(3)BUGS
The driver detects but does not recover from bus clock loss
The driver cannot be included in the public distribution.
PBUS(3)
