csx_Parse_CISTPL_CFTABLE_ENTRY man page on SunOS

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csx_Parse_CISTPL_CFTABLE_Kernel9Functions focsx_Parse_CISTPL_CFTABLE_ENTRY(9F)

NAME
       csx_Parse_CISTPL_CFTABLE_ENTRY  - parse 16-bit Card Configuration Table
       Entry tuple

SYNOPSIS
       #include <sys/pccard.h>

       int32_t csx_Parse_CISTPL_CFTABLE_ENTRY(client_handle_t ch, tuple_t *tu,
       cistpl_cftable_entry_t *cft);

INTERFACE LEVEL
       Solaris DDI Specific (Solaris DDI)

PARAMETERS
       ch	Client handle returned from csx_RegisterClient(9F).

       tu	Pointer to a tuple_t structure (see tuple(9S)) returned	 by  a
		call  to csx_GetFirstTuple(9F) or csx_GetNextTuple(9F).

       cft	Pointer to a cistpl_cftable_entry_t structure  which  contains
		the  parsed CISTPL_CFTABLE_ENTRY tuple information upon return
		from this function.

DESCRIPTION
       This function parses the 16 bit Card Configuration Table	 Entry	tuple,
       CISTPL_CFTABLE_ENTRY, into a form usable by PC Card drivers.

       The  CISTPL_CFTABLE_ENTRY  tuple is used to describe each possible con‐
       figuration of a PC Card and to distinguish among the permitted configu‐
       rations.	 The CISTPL_CONFIG tuple must precede all CISTPL_CFTABLE_ENTRY
       tuples.

STRUCTURE MEMBERS
       The structure members of cistpl_cftable_entry_t are:

       uint32_t			     flags;	/* valid descriptions */
       uint32_t			     ifc;	/* interface description */
						/*  information */
       uint32_t			     pin;	/* values for PRR */
       uint32_t			     index;	/* configuration index number */
       cistpl_cftable_entry_pd_t     pd;	/* power requirements */
						/* description */
       cistpl_cftable_entry_speed_t  speed;	/* device speed description */
       cistpl_cftable_entry_io_t     io;	/* device I/O map */
       cistpl_cftable_entry_irq_t    irq;	/* device IRQ utilization */
       cistpl_cftable_entry_mem_t    mem;	/* device memory space */
       cistpl_cftable_entry_misc_t   misc;	/* miscellaneous
						/* device features */

       The flags field is defined and bit-mapped as follows:

       CISTPL_CFTABLE_TPCE_DEFAULT

	   This is a default configuration

       CISTPL_CFTABLE_TPCE_IF

	   If configuration byte exists

       CISTPL_CFTABLE_TPCE_FS_PWR

	   Power information exists

       CISTPL_CFTABLE_TPCE_FS_TD

	   Timing information exists

       CISTPL_CFTABLE_TPCE_FS_IO

	   I/O information exists

       CISTPL_CFTABLE_TPCE_FS_IRQ

	   IRQ information exists

       CISTPL_CFTABLE_TPCE_FS_MEM

	   MEM space information exists

       CISTPL_CFTABLE_TPCE_FS_MISC

	   MISC information exists

       CISTPL_CFTABLE_TPCE_FS_STCE_EV

	   STCE_EV exists

       CISTPL_CFTABLE_TPCE_FS_STCE_PD

	   STCE_PD exists

       If the CISTPL_CFTABLE_TPCE_IF flag is set,  the ifc field is bit-mapped
       and defined as follows:

       CISTPL_CFTABLE_TPCE_IF_MEMORY

	   Memory interface

       CISTPL_CFTABLE_TPCE_IF_IO_MEM

	   IO and memory

       CISTPL_CFTABLE_TPCE_IF_CUSTOM_0

	   Custom interface 0

       CISTPL_CFTABLE_TPCE_IF_CUSTOM_1

	   Custom interface 1

       CISTPL_CFTABLE_TPCE_IF_CUSTOM_2

	   Custom interface 2

       CISTPL_CFTABLE_TPCE_IF_CUSTOM_3

	   Custom interface 3

       CISTPL_CFTABLE_TPCE_IF_MASK

	   Interface type mask

       CISTPL_CFTABLE_TPCE_IF_BVD

	   BVD active in PRR

       CISTPL_CFTABLE_TPCE_IF_WP

	   WP active in PRR

       CISTPL_CFTABLE_TPCE_IF_RDY

	   RDY active in PRR

       CISTPL_CFTABLE_TPCE_IF_MWAIT

	   WAIT - mem cycles

	pin is a value for the Pin Replacement Register.

       index is a configuration index number.

       The structure members of cistpl_cftable_entry_pd_t are:

       uint32_t			   flags;      /* which descriptions are valid */
       cistpl_cftable_entry_pwr_t  pd_vcc;     /* VCC power description */
       cistpl_cftable_entry_pwr_t  pd_vpp1;    /* Vpp1 power description */
       cistpl_cftable_entry_pwr_t  pd_vpp2;    /* Vpp2 power description */

       This flags field is bit-mapped and defined as follows:

       CISTPL_CFTABLE_TPCE_FS_PWR_VCC

	   Vcc description valid

       CISTPL_CFTABLE_TPCE_FS_PWR_VPP1

	   Vpp1 description valid

       CISTPL_CFTABLE_TPCE_FS_PWR_VPP2

	   Vpp2 description valid

       The structure members of cistpl_cftable_entry_pwr_t are:

       uint32_t	    nomV;	  /* nominal supply voltage */
       uint32_t	    nomV_flags;
       uint32_t	    minV;	  /* minimum supply voltage */
       uint32_t	    minV_flags;
       uint32_t	    maxV;	  /* maximum supply voltage */
       uint32_t	    maxV_flags;
       uint32_t	    staticI;	  /* continuous supply current */
       uint32_t	    staticI_flags;
       uint32_t	    avgI;	  /* max current required averaged over 1 sec. */
       uint32_t	    avgI_flags;
       uint32_t	    peakI;	  /* max current required averaged over 10mS */
       uint32_t	    peakI_flags;
       uint32_t	    pdownI;	  /* power down supply current required */
       uint32_t	    pdownI_flags;

       nomV,  minV,  maxV,   staticI, avgI, peakI_flag, and pdownI are defined
       and bit-mapped as follows:

       CISTPL_CFTABLE_PD_NOMV

	   Nominal supply voltage

       CISTPL_CFTABLE_PD_MINV

	   Minimum supply voltage

       CISTPL_CFTABLE_PD_MAXV

	   Maximum supply voltage

       CISTPL_CFTABLE_PD_STATICI

	   Continuous supply current

       CISTPL_CFTABLE_PD_AVGI

	   Maximum current required averaged	   over 1 second

       CISTPL_CFTABLE_PD_PEAKI

	   Maximum current required averaged	   over 10mS

       CISTPL_CFTABLE_PD_PDOWNI

	   Power down supply current required

       nomV_flags,   minV_flags,   maxV_flags,	 staticI_flags,	   avgI_flags,
       peakI_flags, and pdownI_flags are defined and bit-mapped as follows:

       CISTPL_CFTABLE_PD_EXISTS

	   This parameter exists

       CISTPL_CFTABLE_PD_MUL10

	   Multiply return value by 10

       CISTPL_CFTABLE_PD_NC_SLEEP

	   No connection on sleep/power down

       CISTPL_CFTABLE_PD_ZERO

	   Zero value required

       CISTPL_CFTABLE_PD_NC

	   No connection ever

       The structure members of cistpl_cftable_entry_speed_t are:

       uint32_t	   flags;	/* which timing information is present */
       uint32_t	   wait;	/* max WAIT time in device speed format */
       uint32_t	   nS_wait;	/* max WAIT time in nS */
       uint32_t	   rdybsy;	/* max RDY/BSY time in device speed format */
       uint32_t	   nS_rdybsy;	/* max RDY/BSY time in nS */
       uint32_t	   rsvd;	/* max RSVD time in device speed format */
       uint32_t	   nS_rsvd;	/* max RSVD time in nS */

       The flags field is bit-mapped and defined as follows:

       CISTPL_CFTABLE_TPCE_FS_TD_WAIT

	   WAIT timing exists

       CISTPL_CFTABLE_TPCE_FS_TD_RDY

	   RDY/BSY timing exists

       CISTPL_CFTABLE_TPCE_FS_TD_RSVD

	   RSVD timing exists

       The structure members of cistpl_cftable_entry_io_t are:

       uint32_t	    flags;	  /* direct copy of TPCE_IO byte in tuple */
       uint32_t	    addr_lines;	  /* number of decoded I/O address lines */
       uint32_t	    ranges;	  /* number of I/O ranges */
       cistpl_cftable_entry_io_range_t
		     range[CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES];

       The flags field is defined and bit-mapped as follows:

       CISTPL_CFTABLE_TPCE_FS_IO_BUS

	   Bus width mask

       CISTPL_CFTABLE_TPCE_FS_IO_BUS8

	   8-bit flag

       CISTPL_CFTABLE_TPCE_FS_IO_BUS16

	   16-bit flag

       CISTPL_CFTABLE_TPCE_FS_IO_RANGE

	   IO address ranges exist

       The structure members of cistpl_cftable_entry_io_range_t are:

       uint32_t	    addr;     /* I/O start address */
       uint32_t	    length;   /* I/O register length */

       The structure members of cistpl_cftable_entry_irq_t are:

       uint32_t	    flags;   /* direct copy of TPCE_IR byte in tuple */
       uint32_t	    irqs;    /* bit mask for each allowed IRQ */

       The structure members of cistpl_cftable_entry_mem_t are:

       uint32_t	    flags;     /* memory descriptor type and host addr info */
       uint32_t	    windows;   /* number of memory space descriptors */
       cistpl_cftable_entry_mem_window_t
		window[CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS];

       The flags field is defined and bit-mapped as follows:

       CISTPL_CFTABLE_TPCE_FS_MEM3

	   Space descriptors

       CISTPL_CFTABLE_TPCE_FS_MEM2

	   host_addr=card_addr

       CISTPL_CFTABLE_TPCE_FS_MEM1

	   Card address=0 any host address

       CISTPL_CFTABLE_TPCE_FS_MEM_HOST

	   If host address is present in MEM3

       The structure members of cistpl_cftable_entry_mem_window_t are:

       uint32_t	    length;	/* length of this window */
       uint32_t	    card_addr;	/* card address */
       uint32_t	    host_addr;	/* host address */

       The structure members of cistpl_cftable_entry_misc_t are:

       uint32_t	    flags;	/* miscellaneous features flags */

       The flags field is defined and bit-mapped as follows:

       CISTPL_CFTABLE_TPCE_MI_MTC_MASK

	   Max twin cards mask

       CISTPL_CFTABLE_TPCE_MI_AUDIO

	   Audio on BVD2

       CISTPL_CFTABLE_TPCE_MI_READONLY

	   R/O storage

       CISTPL_CFTABLE_TPCE_MI_PWRDOWN

	   Powerdown capable

       CISTPL_CFTABLE_TPCE_MI_DRQ_MASK

	   DMAREQ mask

       CISTPL_CFTABLE_TPCE_MI_DRQ_SPK

	   DMAREQ on SPKR

       CISTPL_CFTABLE_TPCE_MI_DRQ_IOIS

	   DMAREQ on IOIS16

       CISTPL_CFTABLE_TPCE_MI_DRQ_INP

	   DMAREQ on INPACK

       CISTPL_CFTABLE_TPCE_MI_DMA_8

	   DMA width 8 bits

       CISTPL_CFTABLE_TPCE_MI_DMA_16

	   DMA width 16 bits

RETURN VALUES
       CS_SUCCESS			       Successful operation.

       CS_BAD_HANDLE			       Client handle is invalid.

       CS_UNKNOWN_TUPLE			       Parser  does  not  know	how to
					       parse tuple.

       CS_NO_CARD			       No PC Card in socket.

       CS_NO_CIS			       No Card	Information  Structure
					       (CIS) on PC Card.

       CS_UNSUPPORTED_FUNCTION		       No PCMCIA hardware installed.

CONTEXT
       This function may be called from user or kernel context.

SEE ALSO
       csx_GetFirstTuple(9F),	 csx_GetTupleData(9F),	 csx_Parse_CISTPL_CON‐
       FIG(9F), csx_RegisterClient(9F), csx_ValidateCIS(9F), tuple(9S)

       PC Card 95 Standard, PCMCIA/JEIDA

SunOS 5.10			  20 Dec 199csx_Parse_CISTPL_CFTABLE_ENTRY(9F)
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