ck_pr_rtm man page on DragonFly

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ck_pr_rtm(3)		 BSD Library Functions Manual		  ck_pr_rtm(3)

NAME
     ck_pr_rtm_begin, ck_pr_rtm_end, ck_pr_rtm_abort, ck_pr_rtm_test —
     restricted transactional memory

LIBRARY
     Concurrency Kit (libck, -lck)

SYNOPSIS
     #include <ck_pr.h>

     unsigned int
     ck_pr_rtm_begin(void);

     void
     ck_pr_rtm_end(void);

     void
     ck_pr_rtm_abort(const unsigned int status);

     bool
     ck_pr_rtm_test(void);

DESCRIPTION
     These family of functions implement support for restricted transactional
     memory, if available on the underlying platform.  Currently, support is
     only provided for Intel Haswell and newer x86 microarchitectures that
     have the TSX-NI feature.

     The ck_pr_rtm_begin() function returns CK_PR_RTM_STARTED if a transaction
     was successfully started. In case of an abort, either internal (through a
     ck_pr_rtm_abort) or external, program flow will return to the point which
     the function was called except the return value will consist of a bitmap
     with one or more of the following bits set:

     CK_PR_RTM_EXPLICIT
	     Set if the transactionally was explicitly aborted through
	     ck_pr_rtm_abort().

     CK_PR_RTM_RETRY
	     Set if the transaction failed but can still succeed if retried.

     CK_PR_RTM_CONFLICT
	     The transaction failed due to a conflict in one of the memory
	     addresses that are part of the working set of the transaction.

     CK_PR_RTM_CAPACITY
	     Set if the architecture-defined transaction size limit was
	     exceeded.

     CK_PR_RTM_DEBUG
	     Set if a hardware breakpoint was triggered.

     CK_PR_RTM_NESTED
	     Set if a nested transaction failed.

     The user is also able to specify a one byte abort status by calling
     ck_pr_rtm_abort().	 This status byte can be extracted by calling the
     CK_PR_RTM_CODE() function with the return value of ck_pr_rtm_begin() as
     an argument. The return value of CK_PR_RTM_CODE() will be the value of
     this status byte.	For additional information, please see the Intel
     instruction set manuals.

SEE ALSO
     ck_pr_fence_load(3), ck_pr_fence_load_depends(3), ck_pr_fence_store(3),
     ck_pr_fence_memory(3), ck_pr_load(3), ck_pr_store(3), ck_pr_fas(3),
     ck_pr_faa(3), ck_pr_inc(3), ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3),
     ck_pr_sub(3), ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_add(3),
     ck_pr_btc(3), ck_pr_bts(3), ck_pr_btr(3)

     Additional information available at http://concurrencykit.org/

			       December 17, 2013
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