ck_pr_fence_load man page on DragonFly
[printable version]
ck_pr_fence_load(3) BSD Library Functions Manual ck_pr_fence_load(3)
NAME
ck_pr_fence_load — enforce partial ordering of load operations
LIBRARY
Concurrency Kit (libck, -lck)
SYNOPSIS
#include <ck_pr.h>
void
ck_pr_fence_load(void);
void
ck_pr_fence_strict_load(void);
DESCRIPTION
This function enforces the ordering of any memory load and ck_pr_load(3)
operations relative to the invocation of the function. Any store opera‐
tions that were committed on remote processors and received by the call‐
ing processor before the invocation of ck_pr_fence_load() is also be made
visible only after a call to ck_pr_fence_load(). This function always
serves as an implicit compiler barrier. On architectures with CK_MD_TSO
or CK_MD_PSO specified (total store ordering and partial store ordering
respectively), this operation only serves as a compiler barrier and no
fence instructions will be emitted. To force the unconditional emission
of a load fence, use ck_pr_fence_strict_load(). Architectures implement‐
ing CK_MD_RMO always emit a load fence.
EXAMPLE
#include <ck_pr.h>
static unsigned int a;
static unsigned int b;
void
function(void)
{
unsigned int snapshot_a, snapshot_b;
snapshot_a = ck_pr_load_uint(&a);
/*
* Guarantee that the load from "a" completes
* before the load from "b".
*/
ck_pr_fence_load();
snapshot_b = ck_pr_load_uint(&b);
return;
}
RETURN VALUES
This function has no return value.
SEE ALSO
ck_pr_stall(3), ck_pr_fence_atomic(3), ck_pr_fence_atomic_store(3),
ck_pr_fence_atomic_load(3), ck_pr_fence_load_atomic(3),
ck_pr_fence_load_store(3), ck_pr_fence_load_depends(3),
ck_pr_fence_store(3), ck_pr_fence_memory(3), ck_pr_barrier(3),
ck_pr_fas(3), ck_pr_load(3), ck_pr_store(3), ck_pr_faa(3), ck_pr_inc(3),
ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3), ck_pr_add(3), ck_pr_sub(3),
ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_cas(3), ck_pr_btc(3),
ck_pr_bts(3), ck_pr_btr(3)
Additional information available at http://concurrencykit.org/
April 7, 2013
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